ZHCSE90A September 2015 – October 2015 DLPC910
PRODUCTION DATA.
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
ELECTRICAL | |||||
VCCINT | Supply voltage range (2) | –0.50 | 1.1 | V | |
VCCO | –0.50 | 3.75 | |||
VCCAUX | –0.50 | 3.0 | |||
VI | Input voltage range (3) | 3.3 V | –0.95 | 4.05 | V |
2.5 V | –0.75 | VCCO + 0.50 | |||
VO | Output voltage range (4) | 3.3 V | –0.30 | VCCO – 0.40 | V |
2.5 V | –0.30 | VCCO – 0.40 | |||
ENVIRONMENTAL | |||||
TJ | Junction temperature | 125 | °C | ||
Tstg | Storage temperature (ambient) | –65 | 150 | °C |
VALUE | UNIT | ||||
---|---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1) | ± 2500 | V | |
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins (2) | ± 1500 |
MIN | NOM | MAX | UNIT | |||
---|---|---|---|---|---|---|
ELECTRICAL | ||||||
VCCINT | 1-V supply voltage, core logic | 0.95 | 1.00 | 1.05 | V | |
VCCO | 2.5-V supply voltage, I/O for VCCO_1,3,11,12,13,14,15,16,17,18,21 | 1.14 | 2.50 | 3.45 | V | |
VCCO | 3.3-V supply voltage, I/O for VCCO_0,2,4 | 3.0 | 3.30 | 3.45 | V | |
VCCAUX | 2.5-V supply voltage, I/O | 2.375 | 2.500 | 2.625 | V | |
VI | Input voltage | 3.3-V DCI and CMOS for VCCO_0,2,4 | 0 | VCCO | V | |
2. 5-V CMOS for VCCO_1,3,11,12,13,14,15,16,17,18,21 | 0 | VCCO | ||||
2.5-V LVDS | 0.3 | 2.2 | ||||
VO | Output voltage | 3.3-V DCI and CMOS for VCCO_0,2,4 | 0 | VCCO | V | |
2.5-V CMOS for VCCO_1,3,11,12,13,14,15,16,17,18,21 | 0 | VCCO | ||||
2.5-V LVDS | 0.825 | 1.675 | ||||
TA | Operating ambient temperature | 0 | 85 | °C | ||
ENVIRONMENTAL | ||||||
PD | Continuous total power dissipation | 6 | W |
THERMAL METRIC (1) | DLPC910 | UNIT | |
---|---|---|---|
ZYR (FCBGA) | |||
676 PINS | |||
RθJA | Junction-to-ambient thermal resistance (2) | 12.1 | °C/W |
RθJC | Junction-to-case thermal resistance | 3.2 | °C/W |
RθJB | Junction-to-board thermal resistance | 0.19 | °C/W |
PARAMETER | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|
VIH | High-level input voltage | 3.3-V CMOS | 2.0 | V | ||
VIL | Low-level input voltage | 3.3-V CMOS | 0.8 | V | ||
VOH | High-level output voltage | 3.3-V DCI and CMOS | 2.9 | V | ||
VOL | Low-level output voltage | 3.3-V DCI and CMOS | 0.4 | V | ||
VIH | High-level input voltage | 2.5-V CMOS | 1.7 | V | ||
VIL | Low-level input voltage | 2.5-V CMOS | 0.7 | V | ||
VOH | High-level output voltage | 2.5-V interface | VCCO – 0.4 | V | ||
2.5-V LVDS | 1.38 | |||||
VOL | Low-level output voltage | 2.5-V interface | 0.4 | V | ||
2.5-V LVDS | 1.03 | |||||
CI | Input capacitance | 2.5-V interface | 8 | pF | ||
2.5-V LVDS | 8 | |||||
ICCINT | Supply voltage range, core supply | 1.4 | mA | |||
ICCO | Supply voltage range, I/O supply | 4.2 | mA |
MIN | NOM | MAX | UNIT | ||||
---|---|---|---|---|---|---|---|
fcd | Clock frequency, DCLKIN_n (2) | fcd = 400 MHz | 400 | MHz | |||
fcd = 480 MHz | 480 | ||||||
fcr | Clock frequency, CLK_R | 50 | MHz | ||||
tc | Cycle time, DCLKIN_n | fcd = 400 MHz | 2.5 | ns | |||
fcd = 480 MHz | 2.083 | ||||||
tw(H) | Pulse duration, high | 50% to 50% reference points (signal) | fcd = 400 MHz | 1.25 | ns | ||
fcd = 480 MHz | 1.042 | ||||||
tw(L) | Pulse duration, low | 50% to 50% reference points (signal) | fcd = 400 MHz | 1.25 | ns | ||
fcd = 480 MHz | 1.042 | ||||||
tt | Transition time, tt = tf /tr | 20% to 80% reference points (signal) | fcd = 400 MHz | 0.6 | ns | ||
fcd = 480 MHz | 0.5 | ||||||
tjp | Period Jitter DCLKIN_n (3) | 100 | ps | ||||
tsk | Skew, DIN_A(15-0) to DCLKIN_A | -100 | 100 | ps | |||
Skew, DIN_B(15-0) to DCLKIN_B | -100 | 100 | |||||
Skew, DIN_C(15-0) to DCLKIN_C | -100 | 100 | |||||
Skew, DIN_D(15-0) to DCLKIN_D | -100 | 100 | |||||
Skew, DVALID_n to DCLKIN_n↑ | -100 | 100 | |||||
Skew, BLK_MD BLK_AD to DCLKIN_n↑ (4) | -100 | 100 | |||||
Skew, ROWMD or ROWAD to DCLKIN_n↑ (4) | -100 | 100 | |||||
Skew, STEPVCC to DCLKIN↑ (4) | -100 | 100 |