ZHCSMY7J July   2021  – November 2023 BQ77216

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 说明（续）
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 DC Characteristics
    6. 7.6 Timing Requirements
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Voltage Fault Detection
      2. 8.3.2 Open-Wire Fault Detection
      3. 8.3.3 Temperature Fault Detection
      4. 8.3.4 Oscillator Health Check
      5. 8.3.5 Sense Positive Input for Vx
      6. 8.3.6 Output Drive, COUT and DOUT
      7. 8.3.7 The LATCH Function
      8. 8.3.8 Supply Input, VDD
    4. 8.4 Device Functional Modes
      1. 8.4.1 NORMAL Mode
      2. 8.4.2 FAULT Mode
      3. 8.4.3 Customer Test Mode
  10. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Design Requirements
      2. 9.1.2 Detailed Design Procedure
        1. 9.1.2.1 Cell Connection Sequence
    2. 9.2 Systems Example
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 第三方产品免责声明
    2. 12.2 接收文档更新通知
    3. 12.3 支持资源
    4. 12.4 Trademarks
    5. 12.5 静电放电警告
    6. 12.6 术语表
  14. 13Revision History
  15. 14Mechanical, Packaging, and Orderable Information

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8.4.3 Customer Test Mode

Customer Test Mode (CTM) helps to reduce test time for checking the delay timer parameter once the circuit is implemented in the battery pack. To enter CTM, VDD should be set to at least VCTM higher than V16 (see Figure 8-3). The delay timer is greater than 10 ms, but considerably shorter than the timer delay in normal operation. To exit Customer Test Mode, remove the VDD to a V16 voltage differential of 10 V so that the decrease in this value automatically causes an exit.

CAUTION:

Avoid exceeding any Absolute Maximum Voltages on any pins when placing the part into Customer Test Mode. Also avoid exceeding Absolute Maximum Voltages for the individual cell voltages (VCn–VCn-1) and (V1–VSS). Stressing the pins beyond the rated limits may cause permanent damage to the device.

Figure 8-3 shows the timing for the Customer Test Mode.

GUID-6D54E7CE-7DD2-4095-9EC5-B7C37322634E-low.gifFigure 8-3 Timing for Customer Test Mode