4 Revision History
Changes from March 15, 2023 to August 4, 2023 (from Revision * (MARCH 2023) to Revision A (AUGUST 2023))
-
通篇:将文档产品状态从“预告信息”更改为“量产数据”Go
- (特性):在描述 MMC/SD 特性的第一个要点中添加了多媒体卡 (MMC)Go
- (特性):在引导选项列表中添加了串行 NAND 闪存Go
- (封装信息):更新了表以便与新的内容标准一致,并添加了汽车“-Q1”器件Go
- (Functional Block Diagram): Removed "DDR4" from the "DDR4/LPDDR4 with inline
EEC (32b)" block under the System Memory areaGo
- (Functional Block Diagram): Added the Software Build Sheet
noteGo
- (Device Comparison): Added the Processor-SDK-AM62Ax URL to the
Software Build Sheet noteGo
- (Device Comparison): Corrected the name of the JTAG User ID register
and added the register bit values by device "Features" codeGo
- (Device Comparison): Changed "TBD" to "Yes" for Full CAN-FD
SupportGo
- (Device Comparison): Changed General-Purpose Memory Controller
(GPMC) address range from 1GB to 128MBGo
- (Related Products): Additional content was added to the Related
Products sectionGo
- (MMC0 Signal Descriptions): Removed the note associated with MMC0_CLKGo
- (MMC1 Signal Descriptions): Removed the note associated with MMC1_CLKGo
- (MMC2 Signal Descriptions): Changed the note associated with
MMC2_CLKGo
- (Pin Connectivity Requirements): Updated the requirement for
VMON_3P3_SOC to include another connectivity optionGo
- (Pin Connectivity Requirements): Updated the second paragraph of the
note following the Connectivity Requirements table. The update clarifies the
operation of configurable device IOs and includes precautions that must be taken
to prevent floating signals from damaging device input buffersGo
- (Power-On Hours): Removed commercial
temperature range since it doesn't
applyGo
- (Recommended Operating Conditions): Updated the notes associated with
VDD_CANUART and VDDSHV_CANUART to clarify the requirements for these power
railsGo
- (Power Consumption Summary): Added
new section that references Power Estimation Tool
application noteGo
- (DDR Electrical Characteristics): Added a reference to the JEDEC
standardGo
- (Power-Up Sequencing): Added Power-Up Sequencing – Supply / Signal
Assignments table with waveform references and notes. Added a new waveform for
VDD_CANUART to show its sequence requirements relative to VDD_CORE when powered
from a separate always on power source.Go
- (Power-Down Sequencing): Added Power-Down Sequencing – Supply /
Signal Assignments table with waveform references and notes. Added a new
waveform for VDD_CANUART to show its sequence requirements relative to VDD_CORE
when powered from a separate always on power source.Go
- (Partial IO Power Sequencing): Changed the section title to "Partial
IO Power Sequencing" and included a description of sequencing requirements for
entry into and exit from Partial IO low power modeGo
- (Reset Timing Conditions): Changed the Input slew rate minimum
values for VDD = 1.8V and VDD = 3.3V (original values were
swapped)Go
- (MCU_RESETSTATz, and RESETSTATz Switching Characteristics): Changed
the minimum value of parameter RST13 from "0" to "960".Go
- (MCU_OSC0 Switching Characteristics - Crystal Mode): Defined values for all
previously undefined TBD valuesGo
- (LFXOSC Modes of Operation): Changed the value of PD_C for BYPASS
mode from "X" to "0"Go
- Removing change item for change that was already implemented in a
previous release of both AM64x and AM243x and prevent the change from showing up
again in the current Revision History.Go
- (CPSW3G MDIO Timing): Changed the minimum setup time value (parameter MDIO1)
from "90" to "45". Also changed the minimum and maximum output delay time values
(parameter MDIO7) from "-150" and "150" to "-10" and "10" respectivelyGo
- (DSS Switching Characteristics): Added external pixel clock mode "EXTPCLKIN"
to parameters D2, D3, D4, and D5. Also changed the "Internal PLL" mode min value for
parameters D2 and D3 from "0.0475P" to "0.0475P - 0.3"Go
- Removed the no-break from each figure element since they were
causing an unexpected page breakGo
- Removed the no-break and page-break from each figure elements since
they were causing an unexpected page break in the Switching Charactistics
tableGo
- (MCASP): Updated each AHCLKR/X table note to include a TRM reference
for clock source options. Also corrected a typographical error on the signal
name associated with the first waveform in each timing diagram by changing
"MCASP[x]_ACLKR/X" to "MCASP[x]_AHCLKR/X"Go
- (MCSPI Switching Characteristics - Controller Mode): Replaced
previous table notes 2 and 3 with new table notes 2, 3, 4, and
5Go
- (MMC0 DLL Delay Mapping): Changed the OTAPDLYENA and OTAPDLYSEL
values for Legacy SDR and High Speed SDR modesGo
- (MMC1/MMC2 DLL Delay Mapping for all Timing Modes): Changed the
"UHS-I DR50" mode name to "UHS-I DDR50" to correct a typographical
errorGo
- (OSPI0 Timing Requirements – PHY Data Training): Added three new
timing parameters. Two that define timing parameters associated with SRD with
External Board Loopback, and one that defines the minimum input data valid
window for each mode. Also updated Note 1 to clarify the purpose of the new data
valid window parameterGo
- (OSPI0 Timing Requirements – PHY Data Training, SDR with External
Board Loopback): Added a new timing requirements diagram for SDR with External
Board LoopbackGo
- (OSPI Switching Characteristics – PHY Data Training): Added seven
new timing parameters. Six that define timing parameters associated with SRD
with External Board Loopback, and one that defines the maximum output data valid
window for each modeGo
- (OSPI Switching Characteristics – PHY Data Training): Added maximum
values to the OSPI0_CLK Cycle Time parameters (O1) and (07) to define a minimum
operating frequency of 100MHz. Updated Note 1 and Note 4, where "in ns" was
added to the OSPI_CLK cycle time reference in Note 1 and "refclk" was changed to
"reference clock" in Note 4 so it matches the clock name used in the TRM. Also
updated Note 6 to clarify the purpose of the new data invalid window
parameterGo
- (OSPI0 Switching Characteristics – PHY SDR Data Training): Added a
new switching characteristics diagram for SDR with External Board
LoopbackGo
- (OSPI0 Switching Characteristics – PHY SDR Mode): Updated Note 1 and
Note 4, where "in ns" was added to the OSPI_CLK cycle time reference in Note 1
and "refclk" was changed to "reference clock" in Note 4 so it matches the clock
name used in the TRMGo
- (OSPI0 Switching Characteristics – PHY DDR Mode): Updated Note 1 and
Note 4, where "in ns" was added to the OSPI_CLK cycle time reference in Note 1
and "refclk" was changed to "reference clock" in Note 4 so it matches the clock
name used in the TRMGo
- (OSPI0 Timing Requirements – Tap SDR Mode): Updated the constant
values associated with the minimum setup and minimum hold formulas in parameters
O19 and O20. Note 2 was also updated to change "refclk" to "reference clock" so
it matches the clock name used in the TRMGo
- (OSPI0 Switching Characteristics – Tap SDR Mode): Updated Note 1 and
Note 4, where "in ns" was added to the OSPI_CLK cycle time reference in Note 1
and "refclk" was changed to "reference clock" in Note 4 so it matches the clock
name used in the TRMGo
- (OSPI0 Timing Requirements – Tap DDR Mode): Updated the constant
values associated with the minimum setup and minimum hold formulas in parameters
O13 and O14. Note 2 was also updated to change "refclk" to "reference clock" so
it matches the clock name used in the TRMGo
- (OSPI0 Switching Characteristics – Tap DDR Mode): Updated the
minimum data output delay and maximum data output delay formulas in parameter
O6. Also updated Note 1 and Note 5, where "in ns" was added to the OSPI_CLK
cycle time reference in Note 1 and "refclk" was changed to "reference clock" in
Note 5 so it matches the clock name used in the TRMGo
- (Detailed Description): Added content to "Detailed Description" section and
associated subsectionsGo
- (Power Supply Designs): Added new section with link to PMIC
application noteGo
- (USB VBUS Design Guidelines): Changed USB0_VBUS to USBn_VBUS in the figure,
and included a note that says "USBn_VBUS, where n = 0." so the same image can be used in
other documents that may have more than one instance of USBGo
- (Clock Routing Guidelines): Added new sectionGo
- (Standard Package Symbolization): Updated image to match updates applied to
the Nomenclature Description table in the Device Naming Convention
sectionGo
- (Device Naming Convention): Changed "Q" to "Q1" and "ppp" to
"PPP" in the FIELD PARAMETER column so they match the Standard Package
Symbolization figureGo