ZHCSPA8 March   2024 AFE7950-SP

PRODMIX  

  1.   1
  2. 1特性
  3. 2应用
  4. 3说明
  5. 4Specifications
    1. 4.1  Absolute Maximum Ratings
    2. 4.2  ESD Ratings
    3. 4.3  Recommended Operating Conditions
    4. 4.4  Thermal Information
    5. 4.5  Transmitter Electrical Characteristics
    6. 4.6  RF ADC Electrical Characteristics
    7. 4.7  PLL/VCO/Clock Electrical Characteristics
    8. 4.8  Digital Electrical Characteristics
    9. 4.9  Power Supply Electrical Characteristics
    10. 4.10 Timing Requirements
    11. 4.11 Switching Characteristics
    12. 4.12 Typical Characteristics
      1. 4.12.1  TX Typical Characteristics 800MHz
      2. 4.12.2  TX Typical Characteristics at 1.8GHz
      3. 4.12.3  TX Typical Characteristics at 2.6GHz
      4. 4.12.4  TX Typical Characteristics at 3.5GHz
      5. 4.12.5  TX Typical Characteristics at 4.9GHz
      6. 4.12.6  TX Typical Characteristics at 8.1GHz
      7. 4.12.7  TX Typical Characteristics at 9.6GHz
      8. 4.12.8  RX Typical Characteristics at 800MHz
      9. 4.12.9  RX Typical Characteristics at 1.75-1.9GHz
      10. 4.12.10 RX Typical Characteristics at 2.6GHz
      11. 4.12.11 RX Typical Characteristics at 3.5GHz
      12. 4.12.12 RX Typical Characteristics at 4.9GHz
      13. 4.12.13 RX Typical Characteristics at 8.1GHz
      14. 4.12.14 RX Typical Characteristics at 9.6GHz
  6. 5Device and Documentation Support
    1. 5.1 接收文档更新通知
    2. 5.2 支持资源
    3. 5.3 Trademarks
    4. 5.4 静电放电警告
    5. 5.5 术语表
  7. 6Revision History
  8. 7Mechanical, Packaging, and Orderable Information

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4.12.5 TX Typical Characteristics at 4.9GHz

Typical values at TA = +25°C with nominal supplies. Default conditions: TX input data rate = 491.52MSPS, fDAC = 11796.48MSPS (24x interpolation), interleave mode, 1st Nyquist zone output, PLL clock mode with fREF = 491.52MHz, AOUT = –1dBFS, DSA = 0dB, Sin(x)/x enabled, DSA calibrated

GUID-0AEA20E8-21E5-48AB-A7E7-3C34FB18E081-low.gif
Excluding PCB and cable losses, Aout = -0.5 dFBS, DSA = 0, 4.9GHz matching
Figure 4-149 TX Full Scale vs RF Frequency and Channel at 11796.48MSPS
GUID-2D7AE5B3-D224-4102-916D-8C9F88D862AC-low.gif
fDAC = 11796.48MSPS, Aout = -0.5dFBS, matching 4.9GHz
Figure 4-151 TX Output Power vs DSA Setting and Channel at 4.9GHz
GUID-843B82E3-9E03-49F8-A078-E009F241F64E-low.gif
fDAC =11796.48MSPS, interleave mode, matching at 4.9GHz
Differential Gain Error = POUT(DSA Setting – 1) – POUT(DSA Setting) + 1
Figure 4-153 TX Calibrated Differential Gain Error vs DSA Setting and Channel at 4.9GHz
GUID-80F060EB-013A-4D7A-8498-79E694C306FE-low.gif
fDAC = 11796.48MSPS, interleave mode, matching at 4.9GHz
Integrated Gain Error = POUT(DSA Setting) – POUT(DSA Setting = 0) + (DSA Setting)
Figure 4-155 TX Calibrated Integrated Gain Error vs DSA Setting and Channel at 4.9GHz
GUID-D04AE89E-6038-4669-8937-00CA8D59357C-low.gif
fDAC = 11796.48MSPS, interleaved mode, matching at 4.9GHz
Differential Gain Error = POUT(DSA Setting – 1) – POUT(DSA Setting) + 1
Figure 4-157 TX Calibrated Differential Gain Error vs DSA Setting and Temperature at 4.9GHz
GUID-6E686E96-1A74-44FD-860E-16ABC9D9439D-low.gif
fDAC = 11796.48MSPS, interleaved mode, matching at 4.9GHz
Integrated Gain Error = POUT(DSA Setting) – POUT(DSA Setting = 0) + (DSA Setting)
Figure 4-159 TX Calibrated Integrated Gain Error vs DSA Setting and Temperature at 4.9GHz
GUID-3281C6AA-A354-427D-9C9B-BF3DC097A748-low.gif
fDAC = 11796.48MSPS, interleaved mode, matching at 4.9GHz
Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)
Phase DNL spike may occur at any DSA setting.
Figure 4-161 TX Calibrated Differential Phase Error vs DSA Setting and Channel at 4.9GHz
GUID-1CF07F87-5C1F-4E24-BE58-307BCC013150-low.gif
fDAC = 11796.48MSPS, interleaved mode, matching at 4.9GHz
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 4-163 TX Calibrated Integrated Phase Error vs DSA Setting and Channel at 4.9GHz
GUID-5D297594-C7FE-4736-998E-C1AE5871BB0E-low.gif
fDAC = 11796.48MSPS, interleaved mode, matching at 4.9GHz
Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)
Figure 4-165 TX Calibrated Differential Phase Error vs DSA Setting and Temperature at 4.9GHz
GUID-0C2A5D9D-FBB0-4FB4-9B0A-5E67B602DE84-low.gif
fDAC = 11796.48MSPS, interleaved mode, matching at 4.9GHz, channel with the median variation over DSA setting at 25°C
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 4-167 TX Calibrated Integrated Phase Error vs DSA Setting and Temperature at 4.9GHz
GUID-403761C1-B9DA-474E-9299-CCB0C52E2684-low.gif
fDAC = 11796.48MSPS, interleaved mode, matching at 4.9GHz, fCENTER = 4.9GHz, -13 dBFS each tone
Figure 4-169 TX IMD3 vs DSA Setting at 4.9GHz
GUID-B715F2FB-A7D2-43A1-9984-13B74A76E7A0-low.gif
fDAC = 11796.48MSPS, interleaved mode, matching at 4.9GHz, fCENTER = 4.9GHz, –13 dBFS each tone, worst channel
Figure 4-171 TX IMD3 vs Tone Spacing and Temperature at 4.9GHz
GUID-666B3B52-7F96-448D-9A25-8D7F0ABCDEC8-low.gif
Matching at 4.9GHz, Single tone, fDAC = 11.79648GSPS, interleave mode, 40MHz offset, DSA = 0dB
Figure 4-173 TX Single Tone Output Noise vs Frequency and Amplitude at 4.9GHz
GUID-4DA65BED-F8E0-40BB-9E50-21D60AD1D006-low.gif
Matching at 4.9GHz, single carrier 20MHz BW TM1.1 LTE
Figure 4-175 TX 20MHz LTE ACPR vs Digital Level at 4.9GHz
GUID-7EA990AC-D392-49FA-A8F6-5CE61A65A356-low.gif
Matching at 4.9GHz, single carrier 20MHz BW TM1.1 LTE
Figure 4-177 TX 20MHz LTE ACPR vs DSA at 4.9GHz
GUID-55A32F2E-CB73-40CB-92A7-34591FD6AAD9-low.gif
Matching at 4.9GHz, fDAC = 11.79648GSPS, interleave mode, normalized to output power at harmonic frequency
Figure 4-179 TX HD2 vs Digital Amplitude and Output Frequency at 4.9GHz
GUID-CC051FF0-78B5-4516-8A22-CF90466815D1-low.gif
fDAC = 11796.48MSPS, interleave mode, 4.9GHz matching, includes PCB and cable losses. ILn = fS/n ± fOUT.
Figure 4-181 TX Single Tone (–12 dBFS) Output Spectrum at 4.9GHz (0-fDAC)
GUID-09001E85-DD06-4E22-AFE2-F9C5D281AAA9-low.gif
fDAC = 11796.48MSPS, interleave mode, 4.9GHz matching, includes PCB and cable losses. ILn = fS/n ± fOUT.
Figure 4-183 TX Single Tone (–1 dBFS) Output Spectrum at 4.9GHz (0-fDAC)
GUID-6AE87E09-FE11-47CD-A176-593725D78F0F-low.gif
Excluding PCB and cable losses, Aout = -0.5 dFBS, DSA = 0, 4.9GHz matching
Figure 4-150 TX Full Scale vs RF Frequency and Channel at 5898.24 MSPS, Straight Mode, 2nd Nyquist Zone
GUID-03C18D39-4D42-4F9B-823F-F69942EFB2B7-low.gif
fDAC =11796.48MSPS, interleave mode, matching at 4.9GHz
Differential Gain Error = POUT(DSA Setting – 1) – POUT(DSA Setting) + 1
Figure 4-152 TX Uncalibrated Differential Gain Error vs DSA Setting and Channel at 4.9GHz
GUID-680D11F4-89ED-41DA-853A-A2A8FB33707C-low.gif
fDAC =11796.48MSPS, interleave mode, matching at 4.9GHz
Integrated Gain Error = POUT(DSA Setting) – POUT(DSA Setting = 0) + (DSA Setting)
Figure 4-154 TX Uncalibrated Integrated Gain Error vs DSA Setting and Channel at 4.9GHz
GUID-810D3A16-FD2F-409D-B6AC-E3FA18E209F8-low.gif
fDAC = 11796.48MSPS, interleaved mode, matching at 4.9GHz
Differential Gain Error = POUT(DSA Setting – 1) – POUT(DSA Setting) + 1
Figure 4-156 TX Uncalibrated Differential Gain Error vs DSA Setting and Temperature at 4.9GHz
GUID-2C5AF978-DCD7-48B8-8D52-011F7669588F-low.gif
fDAC = 11796.48MSPS, interleaved mode, matching at 4.9GHz
Integrated Gain Error = POUT(DSA Setting) – POUT(DSA Setting = 0) + (DSA Setting)
Figure 4-158 TX Uncalibrated Integrated Gain Error vs DSA Setting and Temperature at 4.9GHz
GUID-34276DDC-AB4C-4D9A-B432-3D0F7856B40C-low.gif
fDAC = 11796.48MSPS, interleaved mode, matching at 4.9GHz
Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)
Figure 4-160 TX Uncalibrated Differential Phase Error vs DSA Setting and Channel at 4.9GHz
GUID-1A0C0ECD-801A-471E-80DA-1C845AFC1AB1-low.gif
fDAC = 11796.48MSPS, interleaved mode, matching at 4.9GHz
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 4-162 TX Uncalibrated Integrated Phase Error vs DSA Setting and Channel at 4.9GHz
GUID-C0A8DF1A-DF3D-4DF8-8562-3671B1C6D10F-low.gif
fDAC = 11796.48MSPS, interleaved mode, matching at 4.9GHz
Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)
Figure 4-164 TX Uncalibrated Differential Phase Error vs DSA Setting and Temperature at 4.9GHz
GUID-44B2B57C-315F-4E1D-ACFF-DCFE084B9429-low.gif
fDAC = 11796.48MSPS, interleaved mode, matching at 4.9GHz
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 4-166 TX Uncalibrated Integrated Phase Error vs DSA Setting and Temperature at 4.9GHz
GUID-57DDD2F5-49B6-425C-8F27-957F80B33314-low.gif
fDAC = 11796.48MSPS, interleaved mode, matching at 4.9GHz, POUT = –13 dBFS
Figure 4-168 TX Output Noise vs Channel and Attenuation at 2.6GHz
GUID-DD6DF1C1-019F-49B3-A94D-BB8F00813CA7-low.gif
fDAC = 11796.48MSPS, interleaved mode, matching at 4.9GHz, fCENTER = 4.9GHz, –13 dBFS each tone
Figure 4-170 TX IMD3 vs Tone Spacing and Channel at 4.9GHz
GUID-06EC034E-7634-4D88-82DB-754E60684E70-low.gif
fDAC = 11796.48MSPS, interleaved mode, matching at 4.9GHz, fCENTER = 4.9GHz, fSPACING = 20MHz
Figure 4-172 TX IMD3 vs Digital Level at 4.9GHz
GUID-6D52BDA2-EDA3-48D5-99FA-48D3DB12E5E9-low.gif
TM1.1, POUT_RMS = –13dBFS
Figure 4-174 TX 20MHz LTE Output Spectrum at 4.9GHz
GUID-4ECCB610-BF09-4951-8BE2-25A3A015CA79-low.gif
Matching at 4.9GHz, single carrier 20MHz BW TM1.1 LTE
Figure 4-176 TX 20MHz LTE alt-ACPR vs Digital Level at 4.9GHz
GUID-71055E29-0019-4808-9F39-80C8D08E769C-low.gif
Matching at 4.9GHz, single carrier 20MHz BW TM1.1 LTE
Figure 4-178 TX 20MHz LTE alt-ACPR vs DSA at 4.9GHz
GUID-0760F73E-8D3A-4E37-A445-511958FA2F78-low.gif
Matching at 4.9GHz, fDAC = 11.79648GSPS, interleave mode, normalized to output power at harmonic frequency
Figure 4-180 TX HD3 vs Digital Amplitude and Output Frequency at 4.9GHz
GUID-829DCC39-C38C-4103-A457-77D8000E1245-low.gif
fDAC = 11796.48MSPS, interleave mode, 4.9GHz matching, includes PCB and cable losses. ILn = fS/n ± fOUT.
Figure 4-182 TX Single Tone (–6 dBFS) Output Spectrum at 4.9GHz (0-fDAC)