ZHCSFU8B May 2016 – December 2021 ADC32RF80 , ADC32RF83
PRODUCTION DATA
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 0 | 0 | 0 | 0 | SLOW SP EN1 | 0 | 0 |
| W-0h | W-0h | W-0h | W-0h | W-0h | R/W-0h | W-0h | W-0h |
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 7-3 | 0 | W | 0h | Must write 0 |
| 2 | SLOW SP EN1 | R/W | 0h | This bit must be enabled for clock rates below 2.5 GSPS. 0 = ADC sampling rates are faster than 2.5 GSPS 1 = ADC sampling rates are slower than 2.5 GSPS |
| 1-0 | 0 | W | 0h | Must write 0 |