As part of discovery, the source reads the sink E-EDID information to understand the sink’s capabilities. The supported data rate comes from the HDMI Forum Vendor Specific Data Block (HF-VSDB) MAX_TMDS_Character_Rate byte. Depending upon the value, the source will write to target address 0xA8 offset 0x20 bit1, TMDS_CLOCK_RATIO_STATUS. The TDP158 snoops the DDC link to determine the TMDS clock ratio status and thus sets its own TMDS_CLOCK_RATIO_STATUS bit accordingly. If a ‘1’ is written by the source the TMDS clock is 1/40 of TMDS bit period. If a ‘0’ is written, then the TMDS clock is 1/10 of TMDS bit period.

The TDP158 will always default to 1/10 of TMDS bit period unless a ‘1’ is written to address 0xA8 offset 0x20 bit 1 or during a read by the source this bit is set. This helps determine source termination when automatic source termination select is enabled. Otherwise this bit has no other impact on the TDP158. When HPD_SNK is de-asserted this bit is reset to default values of 0 if this feature is enabled. If the source does not write this bit to the sink or during the read the bit is not set the TDP158 will not set the output termination to 75Ω to 150Ω in support of HDMI 2.0. If the TDP158 has entered a power down state using HDP_SNK = low or OE = low this bit is cleared and will be set on a read or write where this bit is set. When DDC_TRAIN_SETDISABLE is 1’b0 the TMDS_CLOCK_RATIO_STATUS bit will reflect the value of the DDC snoop. When DDC_TRAIN_SETDISABLE is 1’b1 the TMDS_CLOCK_RATIO_STATUS bit is set by I²C and DDC snoop is ignored and thus automatic TERM control is ignored and must be manually set. To go back to snoop and automatic TERM control the DDC_TRAIN_SETDISABLE bit has to be cleared and TERM set back to automatic control.