ZHCSHV9 March   2018 LMR14010A

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      简化原理图
      2.      效率与电流间的关系（rep%#402;SW= 0.7MHz，VIN = 12V，VOUT = 3.3V）
  4. 4 修订历史记录
  5. 5 Pin Configuration
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fixed Frequency PWM Control
      2. 7.3.2 Bootstrap Voltage (CB)
      3. 7.3.3 Setting the Output Voltage
      4. 7.3.4 Enable (SHDN ) and VIN Undervoltage Lockout
      5. 7.3.5 Current Limit
      6. 7.3.6 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Continuous Conduction Mode
      2. 7.4.2 Eco-mode™
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Step-By-Step Design Procedure
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Output Inductor Selection
        3. 8.2.2.3 Output Capacitor Selection
        4. 8.2.2.4 Schottky Diode Selection
        5. 8.2.2.5 Input Capacitor Selection
        6. 8.2.2.6 Bootstrap Capacitor Selection
      3. 8.2.3 Application Performance Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 器件支持
      1. 11.1.1 开发支持
        1. 11.1.1.1 使用 WEBENCH® 工具创建定制设计
    2. 11.2 接收文档更新通知
    3. 11.3 社区资源
    4. 11.4 商标
    5. 11.5 静电放电警告
    6. 11.6 Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

10.1 Layout Guidelines

Layout is a critical portion of good power supply design. The following guidelines will help users design a PCB with the best power conversion performance, thermal performance, and minimized generation of unwanted EMI.

  1. The feedback network, resistors R1 and R2, should be kept close to the FB pin, and away from the inductor to minimize coupling noise into the feedback pin.
  2. The input capacitor CIN must be placed close to the VIN pin. This will reduce copper trace inductance which effects input voltage ripple of the device.
  3. The inductor L1 should be placed close to the SW pin to reduce magnetic and electrostatic noise.
  4. The output capacitor COUT should be placed close to the junction of L1 and the diode D1. The L1, D1 and COUT trace should be as short as possible to reduce conducted and radiated noise.
  5. The ground connection for the diode, CIN and COUT should be tied to the system ground plane in only one spot (preferably at the COUT ground point) to minimize conducted noise in the system ground plane.