SLVSD14A June 2017 – June 2020 DRV10983-Q1
PRODUCTION DATA.
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
Reserved | Reserved | Reserved | Reserved | Reserved | Reserved | Reserved | Reserved |
R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
eeIndAddress [7] | eeIndAddress [6] | eeIndAddress [5] | eeIndAddress [4] | eeIndAddress [3] | eeIndAddress [2] | eeIndAddress [1] | eeIndAddress [0] |
R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
15:8 | Reserved | R | 0x0 | Do not access these bits. |
7:0 | eeIndAddress[7:0] | R | 0x0 | EEPROM individual access address.
Contents of this register define the address of EEPROM for the individual access operation. For example, for writing/reading CONFIG1 in individual access mode happens if eeIndAddress = 0x90. |