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低壓側驅動器

UCC27517A

現行

具有 5-V UVLO 和負輸入電壓處理功能的 4-A/4-A 單通道閘極驅動器

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產品規格表

UCC27517A

現行
產品規格表 立即訂購

產品詳細資料

Number of channels 1 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 4 Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 18 Features Hysteretic Logic Operating temperature range (°C) -40 to 125 Rise time (ns) 9 Fall time (ns) 7 Propagation delay time (µs) 0.013 Input threshold CMOS, TTL Channel input logic Inverting, Non-Inverting Input negative voltage (V) -5 Rating Catalog Undervoltage lockout (typ) (V) 4 Driver configuration Inverting, Non-Inverting
Number of channels 1 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 4 Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 18 Features Hysteretic Logic Operating temperature range (°C) -40 to 125 Rise time (ns) 9 Fall time (ns) 7 Propagation delay time (µs) 0.013 Input threshold CMOS, TTL Channel input logic Inverting, Non-Inverting Input negative voltage (V) -5 Rating Catalog Undervoltage lockout (typ) (V) 4 Driver configuration Inverting, Non-Inverting
SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8
  • Low-Cost Gate-Driver Device Offering Superior
    Replacement of NPN and PNP Discrete Solutions
  • 4-A Peak-Source and Sink Symmetrical Drive
  • Ability to Handle Negative Voltages (–5 V) at
    Inputs
  • Fast Propagation Delays (13-ns typical)
  • Fast Rise and Fall Times (9-ns and 7-ns typical)
  • 4.5 to 18-V Single-Supply Range
  • Outputs Held Low During VDD UVLO (ensures
    glitch-free operation at power up and power down)
  • TTL and CMOS Compatible Input-Logic Threshold
    (independent of supply voltage)
  • Hysteretic-Logic Thresholds for High-Noise
    Immunity
  • Dual Input Design (choice of an inverting (IN- pin)
    or non-inverting (IN+ pin) driver configuration)
    • Unused Input Pin can be Used for Enable or
      Disable Function
  • Output Held Low when Input Pins are Floating
  • Input Pin Absolute Maximum Voltage Levels Not
    Restricted by VDD Pin Bias Supply Voltage
  • Operating Temperature Range of –40°C to
    +140°C
  • 5-Pin DBV (SOT-23) Package Option
  • Low-Cost Gate-Driver Device Offering Superior
    Replacement of NPN and PNP Discrete Solutions
  • 4-A Peak-Source and Sink Symmetrical Drive
  • Ability to Handle Negative Voltages (–5 V) at
    Inputs
  • Fast Propagation Delays (13-ns typical)
  • Fast Rise and Fall Times (9-ns and 7-ns typical)
  • 4.5 to 18-V Single-Supply Range
  • Outputs Held Low During VDD UVLO (ensures
    glitch-free operation at power up and power down)
  • TTL and CMOS Compatible Input-Logic Threshold
    (independent of supply voltage)
  • Hysteretic-Logic Thresholds for High-Noise
    Immunity
  • Dual Input Design (choice of an inverting (IN- pin)
    or non-inverting (IN+ pin) driver configuration)
    • Unused Input Pin can be Used for Enable or
      Disable Function
  • Output Held Low when Input Pins are Floating
  • Input Pin Absolute Maximum Voltage Levels Not
    Restricted by VDD Pin Bias Supply Voltage
  • Operating Temperature Range of –40°C to
    +140°C
  • 5-Pin DBV (SOT-23) Package Option

The UCC27517A single-channel, high-speed, low-side gate driver device is capable of effectively driving MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, the UCC27517A is capable of sourcing and sinking high peak-current pulses into capacitive loads offering rail-to-rail drive capability and extremely small propagation delay typically 13 ns.

The UCC27517A device is capable of handling –5 V at input.

The UCC27517A provides 4-A source and 4-A sink (symmetrical drive) peak-drive current capability at VDD = 12 V.

The UCC27517A is designed to operate over a wide VDD range of 4.5 V to 18 V and wide temperature range of –40°C to 140°C. Internal Undervoltage Lockout (UVLO) circuitry on VDD pin holds output low outside VDD operating range. The capability to operate at low voltage levels such as below 5 V, along with best-in-class switching characteristics, is especially suited for driving emerging wide band-gap power-switching devices such as GaN power semiconductor devices.

UCC27517A features a dual input design which offers flexibility of implementing both inverting (IN– pin) and non-inverting (IN+ pin) configurations with the same device. Either the IN+ or IN– pin can be used to control the state of the driver output. The unused input pin can be used for enable and disable function. For protection purpose, internal pullup and pulldown resistors on the input pins ensure that outputs are held low when input pins are in floating condition. Hence the unused input pin is not left floating and must be properly biased to ensure that driver output is in enabled for normal operation.

The input pin threshold of the UCC27517A device is based on TTL and CMOS compatible low-voltage logic which is fixed and independent of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity.

The UCC27517A single-channel, high-speed, low-side gate driver device is capable of effectively driving MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, the UCC27517A is capable of sourcing and sinking high peak-current pulses into capacitive loads offering rail-to-rail drive capability and extremely small propagation delay typically 13 ns.

The UCC27517A device is capable of handling –5 V at input.

The UCC27517A provides 4-A source and 4-A sink (symmetrical drive) peak-drive current capability at VDD = 12 V.

The UCC27517A is designed to operate over a wide VDD range of 4.5 V to 18 V and wide temperature range of –40°C to 140°C. Internal Undervoltage Lockout (UVLO) circuitry on VDD pin holds output low outside VDD operating range. The capability to operate at low voltage levels such as below 5 V, along with best-in-class switching characteristics, is especially suited for driving emerging wide band-gap power-switching devices such as GaN power semiconductor devices.

UCC27517A features a dual input design which offers flexibility of implementing both inverting (IN– pin) and non-inverting (IN+ pin) configurations with the same device. Either the IN+ or IN– pin can be used to control the state of the driver output. The unused input pin can be used for enable and disable function. For protection purpose, internal pullup and pulldown resistors on the input pins ensure that outputs are held low when input pins are in floating condition. Hence the unused input pin is not left floating and must be properly biased to ensure that driver output is in enabled for normal operation.

The input pin threshold of the UCC27517A device is based on TTL and CMOS compatible low-voltage logic which is fixed and independent of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity.
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類型 標題 日期
* Data sheet UCC27517A Single-Channel High-Speed Low-Side Gate Driver with Negative Input Voltage Capability (with 4-A Peak Source and Sink) datasheet (Rev. C) PDF | HTML 2015年 8月 31日
Application brief Why Low-Side Gate Drivers are Better Than Discrete Designs PDF | HTML 2025年 11月 13日
Application note Selecting Gate Drivers for HVAC Systems (Rev. A) PDF | HTML 2025年 11月 7日
Application note Applying Non-isolated Gate Drivers in Your Home Tool and Accessory Designs PDF | HTML 2025年 5月 16日
Application note Review of Different Power Factor Correction (PFC) Topologies' Gate Driver Needs PDF | HTML 2024年 1月 22日
Application note Using a Single-Output Gate-Driver for High-Side or Low-Side Drive (Rev. B) PDF | HTML 2023年 9月 8日
Application note Benefits of a Compact, Powerful, and Robust Low-Side Gate Driver PDF | HTML 2021年 11月 10日
Application brief External Gate Resistor Selection Guide (Rev. A) 2020年 2月 28日
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 2020年 2月 28日
Application brief How to overcome negative voltage transients on low-side gate drivers' inputs 2019年 1月 18日
More literature Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) 2018年 10月 29日
Application brief Enable Function with Unused Differential Input 2018年 7月 11日
Application brief Low-Side Gate Drivers With UVLO Versus BJT Totem-Pole 2018年 3月 16日
Technical article How to achieve higher system efficiency- part two: high-speed gate drivers PDF | HTML 2017年 1月 31日
White paper Advancing Power Supply Solutions Through the Promise of GaN 2015年 2月 24日
More literature Design Review of a Full-Featured 350-W Offline Power Converter 2013年 10月 29日

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開發板

UCC57142EVM — UCC57142 評估模組

UCC57142EVM 主要用於評估 UCC57142 的功能。可針對電容負載或採用 TO-220 封裝之功率裝置評估驅動器的性能。UCC57142EVM 評估板可讓使用者透過其表面黏著測試點，連接至 IN、EN/FLT、OCP 與 OUT 等連接點。UCC57142EVM 可透過跨接器支援不同的 UCC57142 衍生型號。UCC57142EVM 也可透過電路板修改與其他採用 DBV 封裝的閘極驅動器相容。
使用指南: PDF | HTML
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模擬型號

UCC27517 PSpice Transient Model (Rev. B)

SLUM286B.ZIP (51 KB) - PSpice Model
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模擬型號

UCC27517 TINA-TI Transient Reference Design

SLUM317.TSC (67 KB) - TINA-TI Reference Design
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模擬型號

UCC27517 TINA-TI Transient Spice Model

SLUM318.ZIP (8 KB) - TINA-TI Spice Model
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模擬型號

UCC27517 Unencrypted PSpice Transient Model

SLUM491.ZIP (2 KB) - PSpice Model
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計算工具

SLURB28 — UCC27516 and UCC27517 Schematic Review Template

This can be used to help the design engineer effectively select components and perform the layout to optimize their system for the gate driver.
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產品
低壓側驅動器
  • UCC27516 — 採 SON 封裝且具 5-V UVLO 和 13-ns 傳播延遲的 4-A/4-A 單通道閘極驅動器
  • UCC27517 — 採 SOT-23 封裝且具 5-V UVLO 和 13-ns 傳播延遲的 4-A/4-A 單通道閘極驅動器
  • UCC27517A — 具有 5-V UVLO 和負輸入電壓處理功能的 4-A/4-A 單通道閘極驅動器
  • UCC27517A-Q1 — 具 5-V UVLO 與雙輸入架構的車用 4-A/4-A 單通道閘極驅動器
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PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一，涵蓋我們的類比和電源產品組合，以及特定類比行為模型，且使用無需支付費用。

PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前，建立完整的終端設備設計和解決方案原型，進而縮短上市時間並降低開發成本。 

在 PSpice for TI 設計與模擬工具中，您可以搜尋 TI (...)
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此參考設計提供就緒的前端 PFC 平台，可處理高達 1kW 的各種電源供應器，改善整體系統性能，降低匯流排電容，降低 RMS 電流及前端保護。符合嚴格的電流 THD 與功率因數規範，並防止輸出過電流，過電壓和欠電壓情況發生。

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此通用降壓轉換器參考設計搭載電壓模式降壓轉換器，同時結合小型板載電子負載，以展示頻域小訊號分析（網路分析）與時域大訊號分析（暫態響應）之間的關係。迴路頻寬已透過 20kHz 以上的交越頻率壓縮至最大值。在大量生產中使用此轉換器設計時，建議使用 15kHz 交越頻率且具安全增益裕度的補償值。在此設計中，已用盡迴路頻寬來測試量測設備的波德函數，並展示汲極抖動（次諧波雜訊）對電源完整性的影響。
Test report: PDF
電路圖: PDF
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