LMX2487
- Quadruple Modulus Prescaler for Lower Divides
- RF PLL: 16/17/20/21 or 32/33/36/37
- IF PLL: 8/9 or 16/17
- Advanced Delta Sigma Fractional Compensation
- 12-Bit or 22-Bit Selectable Fractional Modulus
- Up to 4th Order Programmable Delta-Sigma
Modulator
- Improved Lock Times
- Fastlock / Cycle Slip Reduction With Single-
Word Write to Change Frequencies - Integrated Time-Out Counter
- Fastlock / Cycle Slip Reduction With Single-
- Wide Operating Range
- LMX2487 RF PLL: 1.0 GHz to 6.0 GHz
- Useful Features
- Digital Lock Detect Output
- Hardware and Software Power-Down Control
- On-Chip Input Frequency Doubler
- RF Phase Comparison Detector Up to 50 MHz
- 2.5-V to 3.6-V Operation With ICC = 8.5 mA
The LMX2487 device is a low power, high performance delta-sigma fractional-N PLL with an auxiliary integer-N PLL. It is fabricated using TI’s advanced process.
With delta-sigma architecture, fractional spurs at lower offset frequencies are pushed to higher frequencies outside the loop bandwidth. The ability to push close in spur and phase noise energy to higher frequencies is a direct function of the modulator order. Unlike analog compensation, the digital feedback technique used in the LMX2487 is highly resistant to changes in temperature and variations in wafer processing. The LMX2487 delta-sigma modulator is programmable up to fourth order, which allows the designer to select the optimum modulator order to fit the phase noise, spur, and lock time requirements of the system.
Serial data for programming the LMX2487 is transferred through a three-line, high-speed (20-MHz) MICROWIRE interface. The LMX2487 offers fine frequency resolution, low spurs, fast programming speed, and a single-word write to change the frequency. This makes it ideal for direct digital modulation applications, where the N-counter is directly modulated with information. The LMX2487 is available in a 24-lead 4.0 × 4.0 × 0.8 mm WQFN package.
技术文档
| 顶层文档 | 类型 | 标题 | 格式选项 | 下载最新的英语版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 数据表 | LMX2487 1-GHz to 6-GHz High Performance Delta-Sigma Low-Power Dual PLLatinum Frequency Synthesizers With 3-GHz Integer PLL 数据表 (Rev. C) | PDF | HTML | 2016-1-13 |
设计与开发
如需其他信息或资源,请点击以下任一标题进入详情页面查看(如有)。
CODELOADER — CodeLoader Device Register Programming v4.19.0
The CodeLoader 4 software is used to program the LMX PLLs and LMK timing devices through either the USB or line print terminal (LPT) port of a computer. This software also provides information on how to program the device by showing the bits that are actually sent.
Which software do I use?
Product | (...) |
CLOCKDESIGNTOOL — Clock Design Tool Software
时钟设计工具软件可帮助选择器件、设计环路滤波器,并进行定时器件解决方案仿真。当您输入所需的输出频率和参考频率(可选)后,该工具就会提供能够满足指定要求的 TI 器件、分频器值,并推荐能够尽可能减少抖动的环路滤波器。
CLOCKDESIGNTOOL 教程视频
我要使用哪一个软件?
产品 | 环路滤波器和器件配置 + 仿真 | 模拟工具 | 器件寄存器编程 |
LMX24xx PLL 系列 | EasyPLL | ||
LMX25xx PLL+VCO 系列 | 时钟设计工具 | ||
LMK 抖动清除器和分配器 |
TICSPRO-SW — TICS Pro GUI and Live Programming Tool for Clocking Devices
德州仪器 (TI) 时钟和合成器 (TICS) 专业软件用于对具有以下前缀的产品编号的评估模块 (EVM) 进行编程:CDC、LMK 和 LMX。这些产品包括锁相环和电压控制振荡器 (PLL+VCO)、合成器和时钟器件。
CLOCK-TREE-ARCHITECT — 时钟树架构编程软件
时钟树架构是一款时钟树综合工具,可根据您的系统要求生成时钟树解决方案,从而帮助您简化设计流程。该工具从庞大的时钟产品数据库中提取数据,然后生成系统级多芯片时钟解决方案。
PLLATINUMSIM-SW — PLL 环路滤波器、相位噪声、锁定时间和杂散模拟工具
PLLATINUMSIM-SW 是一款仿真工具,允许用户创建我们 PLLatinum™ 集成电路的详细设计和仿真,其中包括 LMX 系列锁相环 (PLL) 和合成器。
| 封装 | 引脚 | CAD 符号、封装和 3D 模型 |
|---|---|---|
| WQFN (RTW) | 24 | Ultra Librarian |