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运算放大器 (op amps)
高速运算放大器 (GBW ≥ 50MHz)

LMP7718

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双通道 88MHz 精密低噪声 1.8V CMOS 输入、解补偿放大器

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LMP7718

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产品详情

Architecture FET / CMOS Input, Voltage FB Number of channels 2 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 1.8 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 GBW (typ) (MHz) 88 BW at Acl (MHz) 8.8 Acl, min spec gain (V/V) 10 Slew rate (typ) (V/µs) 28 Vn at flatband (typ) (nV√Hz) 5.8 Vn at 1 kHz (typ) (nV√Hz) 5.8 Iq per channel (typ) (mA) 1.3 Vos (offset voltage at 25°C) (max) (mV) 0.15 Rail-to-rail In to V-, Out Features Decompensated Rating Catalog Operating temperature range (°C) -40 to 125 CMRR (typ) (dB) 100 Input bias current (max) (pA) 50 Offset drift (typ) (µV/°C) 1.8 Iout (typ) (mA) 21
Architecture FET / CMOS Input, Voltage FB Number of channels 2 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 1.8 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 GBW (typ) (MHz) 88 BW at Acl (MHz) 8.8 Acl, min spec gain (V/V) 10 Slew rate (typ) (V/µs) 28 Vn at flatband (typ) (nV√Hz) 5.8 Vn at 1 kHz (typ) (nV√Hz) 5.8 Iq per channel (typ) (mA) 1.3 Vos (offset voltage at 25°C) (max) (mV) 0.15 Rail-to-rail In to V-, Out Features Decompensated Rating Catalog Operating temperature range (°C) -40 to 125 CMRR (typ) (dB) 100 Input bias current (max) (pA) 50 Offset drift (typ) (µV/°C) 1.8 Iout (typ) (mA) 21
SOIC (D) 8 29.4 mm² (4.9 mm × 6 mm) VSSOP (DGK) 8 14.7 mm² (3 mm × 4.9 mm)
  • (Typical 5V Supply, Unless Otherwise Noted)
  • Input Offset Voltage: ±150 µV (max)
  • Input Referred Voltage Noise: 5.8 nV/√Hz
  • Input Bias Current: 100 fA
  • Gain Bandwidth Product: 88 MHz
  • Supply Voltage Range: 1.8V to 5.5V
  • Supply Current Per Channel
    • LMP7717: 1.15 mA
    • LMP7718: 1.30 mA
  • Rail-to-Rail Output Swing
    • @ 10 kΩ Load: 25 mV from Rail
    • @ 2 kΩ Load: 45 mV from Rail
  • Ensured 2.5V and 5.0V Performance
  • Total Harmonic Distortion: 0.04% @1 kHz, 600Ω
  • Temperature Range: −40°C to 125°C

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  • (Typical 5V Supply, Unless Otherwise Noted)
  • Input Offset Voltage: ±150 µV (max)
  • Input Referred Voltage Noise: 5.8 nV/√Hz
  • Input Bias Current: 100 fA
  • Gain Bandwidth Product: 88 MHz
  • Supply Voltage Range: 1.8V to 5.5V
  • Supply Current Per Channel
    • LMP7717: 1.15 mA
    • LMP7718: 1.30 mA
  • Rail-to-Rail Output Swing
    • @ 10 kΩ Load: 25 mV from Rail
    • @ 2 kΩ Load: 45 mV from Rail
  • Ensured 2.5V and 5.0V Performance
  • Total Harmonic Distortion: 0.04% @1 kHz, 600Ω
  • Temperature Range: −40°C to 125°C

All trademarks are the property of their respective owners.

The LMP7717 (single) and the LMP7718 (dual) low noise, CMOS input operational amplifiers offer a low input voltage noise density of 5.8 nV/√Hz while consuming only 1.15 mA (LMP7717) of quiescent current. The LMP7717/LMP7718 are stable at a gain of 10 and have a gain bandwidth (GBW) product of 88 MHz. The LMP7717/LMP7718 have a supply voltage range of 1.8V to 5.5V and can operate from a single supply. The LMP7717/LMP7718 each feature a rail-to-rail output stage. Both amplifiers are part of the LMP precision amplifier family and are ideal for a variety of instrumentation applications.

The LMP7717 family provides optimal performance in low voltage and low noise systems. A CMOS input stage, with typical input bias currents in the range of a few femto-Amperes, and an input common mode voltage range, which includes ground, make the LMP7717/LMP7718 ideal for low power sensor applications where high speeds are needed.

The LMP7717/LMP7718 are manufactured using TI’s advanced VIP50 process. The LMP7717 is offered in either a 5-Pin SOT-23 or an 8-Pin SOIC package. The LMP7718 is offered in either the 8-Pin SOIC or the 8-Pin VSSOP.

The LMP7717 (single) and the LMP7718 (dual) low noise, CMOS input operational amplifiers offer a low input voltage noise density of 5.8 nV/√Hz while consuming only 1.15 mA (LMP7717) of quiescent current. The LMP7717/LMP7718 are stable at a gain of 10 and have a gain bandwidth (GBW) product of 88 MHz. The LMP7717/LMP7718 have a supply voltage range of 1.8V to 5.5V and can operate from a single supply. The LMP7717/LMP7718 each feature a rail-to-rail output stage. Both amplifiers are part of the LMP precision amplifier family and are ideal for a variety of instrumentation applications.

The LMP7717 family provides optimal performance in low voltage and low noise systems. A CMOS input stage, with typical input bias currents in the range of a few femto-Amperes, and an input common mode voltage range, which includes ground, make the LMP7717/LMP7718 ideal for low power sensor applications where high speeds are needed.

The LMP7717/LMP7718 are manufactured using TI’s advanced VIP50 process. The LMP7717 is offered in either a 5-Pin SOT-23 or an 8-Pin SOIC package. The LMP7718 is offered in either the 8-Pin SOIC or the 8-Pin VSSOP.
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技术文档

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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 LMP7717/18 88 MHz, Precision, Low Noise, 1.8V CMOS Input, Decompensated Op Amp 数据表 (Rev. H) 2013-3-27
技术文章 3 common questions when designing with high-speed amplifiers PDF | HTML 2020-7-17
电子书 The Signal e-book: 有关运算放大器设计主题的博客文章汇编 PDF | HTML 英语版 PDF | HTML 2018-1-31
EVM 用户指南 551013276/3277 Eval Boards for Dual Decompensated Op Amps (MSOP-8 & SOIC-8) (Rev. A) 2013-5-1

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仿真模型

LMP7718 PSPICE Model

SNOM095.ZIP (2 KB) - PSpice 模型
支持的产品和硬件
封装 引脚 CAD 符号、封装和 3D 模型
SOIC (D) 8 Ultra Librarian
VSSOP (DGK) 8 Ultra Librarian
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