SN74AUP1G14
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Performance Tested Per JESD 22
- 2000-V Human-Body Model
(A114-B, Class II) - 1000-V Charged-Device Model (C101)
- 2000-V Human-Body Model
- Low Static-Power Consumption
(ICC = 0.9 µA Maximum) - Low Dynamic-Power Consumption
(Cpd = 4.4 pF Typical at 3.3 V) - Low Input Capacitance (CI = 1.5 pF Typical)
- Low Noise – Overshoot and Undershoot
<10% of VCC - Ioff Supports Partial-Power-Down Mode Operation
- Includes Schmitt-Trigger Inputs
- Wide Operating VCC Range of 0.8 V to 3.6 V
- Optimized for 3.3-V Operation
- 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
- tpd = 4.9 ns Maximum at 3.3 V
The AUP family is TIs premier solution to the industrys low power needs in battery-powered portable applications. This family assures a very low static and dynamic power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see AUP – The Lowest-Power Family and Excellent Signal Integrity).
This device functions as an independent gate with Schmitt-trigger inputs, which allows for slow input transition and better switching-noise immunity at the input.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.
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技术文档
| 顶层文档 | 类型 | 标题 | 格式选项 | 下载最新的英语版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 数据表 | SN74AUP1G14 Low-Power Single Schmitt-Trigger Inverter 数据表 (Rev. J) | PDF | HTML | 2017-11-2 | ||
| 应用简报 | 了解施密特触发器 (Rev. B) | PDF | HTML | 英语版 (Rev.B) | PDF | HTML | 2025-5-5 | |
| 应用手册 | Designing and Manufacturing with TI's X2SON Packages | 2017-8-23 | ||||
| 白皮书 | Solving CMOS Transition Rate Issues Using Schmitt Trigger Solution (Rev. A) | 2017-5-1 |
设计与开发
如需其他信息或资源,请点击以下任一标题进入详情页面查看(如有)。
5-8-LOGIC-EVM — 支持 5 至 8 引脚 DCK、DCT、DCU、DRL 和 DBV 封装的通用逻辑评估模块
5-8-NL-LOGIC-EVM — 支持 5 至 8 引脚 DPW、DQE、DRY、DSF、DTM、DTQ 和 DTT 封装的通用逻辑和转换 EVM
通用 EVM 旨在支持采用 DTT、DRY、DPW、DTM、DQE、DQM、DSF 或 DTQ 封装的任何逻辑或转换器件。电路板设计可实现灵活的评估。
TIDA-00377 — 采用 MOSFET 的自供电交流固态继电器参考设计
| 封装 | 引脚 | CAD 符号、封装和 3D 模型 |
|---|---|---|
| SOT-5X3 (DRL) | 5 | Ultra Librarian |
| X2SON (DSF) | 6 | Ultra Librarian |
| SOT-23 (DBV) | 5 | Ultra Librarian |
| DSBGA (YFP) | 4 | Ultra Librarian |
| SOT-SC70 (DCK) | 5 | Ultra Librarian |
| X2SON (DPW) | 5 | Ultra Librarian |
| USON (DRY) | 6 | Ultra Librarian |