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Rating Automotive Architecture Gate driver Control interface 3xPWM, 6xPWM Vs (min) (V) 4.5 Vs ABS (max) (V) 65 Features 1x low side current sense, Bootstrap Architecture for Gate Driver, HW based configuration, Supports 100% PWM Duty Cycle with Trickle Charge pump Operating temperature range (°C) -40 to 125
Rating Automotive Architecture Gate driver Control interface 3xPWM, 6xPWM Vs (min) (V) 4.5 Vs ABS (max) (V) 65 Features 1x low side current sense, Bootstrap Architecture for Gate Driver, HW based configuration, Supports 100% PWM Duty Cycle with Trickle Charge pump Operating temperature range (°C) -40 to 125
VQFN (RGF) 40 35 mm² 7 x 5
  • 65-V Three Phase Half-Bridge Gate Driver
    • Drives 3 High-Side and 3 Low-Side N-Channel MOSFETs (NMOS)
    • 4.5 to 60-V Operating Voltage Range
    • Supports 100% PWM Duty Cycle with Trickle Charge pump
  • Bootstrap based Gate Driver Architecture
    • 1000-mA Maximum Peak Source Current
    • 2000-mA Maximum Peak Sink Current
  • Integrated Current Sense Amplifier with low input offset (optimized for 1 shunt)
    • Adjustable Gain (5, 10, 20, 40 V/V)
  • Hardware interface provides simple configuration
  • Ultra-low power sleep mode <1 uA at 25 ̊C
  • 4-ns (typ) propagation delay matching between phases
  • Independent driver shutdown path (DRVOFF)
  • 65-V tolerant wake pin (nSLEEP)
  • Supports negative transients upto -10V on SHx
  • 6x and 3x PWM Modes
  • Supports 3.3-V, and 5-V Logic Inputs
  • Accurate LDO (AVDD), 3.3 V ±3%, 80 mA
  • Compact QFN Packages and Footprints
  • Adjustable VDS overcurrent threshold through VDSLVL pin
  • Adjustable deadtime through DT pin
  • Efficient System Design With Power Blocks
  • Integrated Protection Features
    • PVDD Undervoltage Lockout (PVDDUV)
    • GVDD Undervoltage (GVDDUV)
    • Bootstrap Undervoltage (BST_UV)
    • Overcurrent Protection (VDS_OCP, SEN_OCP)
    • Thermal Shutdown (OTSD)
    • Fault Condition Indicator (nFAULT)
  • 65-V Three Phase Half-Bridge Gate Driver
    • Drives 3 High-Side and 3 Low-Side N-Channel MOSFETs (NMOS)
    • 4.5 to 60-V Operating Voltage Range
    • Supports 100% PWM Duty Cycle with Trickle Charge pump
  • Bootstrap based Gate Driver Architecture
    • 1000-mA Maximum Peak Source Current
    • 2000-mA Maximum Peak Sink Current
  • Integrated Current Sense Amplifier with low input offset (optimized for 1 shunt)
    • Adjustable Gain (5, 10, 20, 40 V/V)
  • Hardware interface provides simple configuration
  • Ultra-low power sleep mode <1 uA at 25 ̊C
  • 4-ns (typ) propagation delay matching between phases
  • Independent driver shutdown path (DRVOFF)
  • 65-V tolerant wake pin (nSLEEP)
  • Supports negative transients upto -10V on SHx
  • 6x and 3x PWM Modes
  • Supports 3.3-V, and 5-V Logic Inputs
  • Accurate LDO (AVDD), 3.3 V ±3%, 80 mA
  • Compact QFN Packages and Footprints
  • Adjustable VDS overcurrent threshold through VDSLVL pin
  • Adjustable deadtime through DT pin
  • Efficient System Design With Power Blocks
  • Integrated Protection Features
    • PVDD Undervoltage Lockout (PVDDUV)
    • GVDD Undervoltage (GVDDUV)
    • Bootstrap Undervoltage (BST_UV)
    • Overcurrent Protection (VDS_OCP, SEN_OCP)
    • Thermal Shutdown (OTSD)
    • Fault Condition Indicator (nFAULT)

The DRV8329-Q1 family of devices is an integrated gate driver for three-phase applications. The devices provide three half-bridge gate drivers, each capable of driving high-side and low-side N-channel power MOSFETs. The device generates the correct gate drive voltages using an internal charge pump and enhances the high-side MOSFETs using a bootstrap circuit. A trickle charge pump is included to support 100% duty cycle. The Gate Drive architecture supports peak gate drive currents up to 1-A source and 2-A sink. The DRV8329-Q1 can operate from a single power supply and supports a wide input supply range of 4.5 to 60 V.

The 6x and 3x PWM modes allow for simple interfacing to controller circuits. The device has integrated accurate 3.3-V LDO that can be used to power external controller and can be used as reference for CSA. The configuration settings for the device are configurable through hardware (H/W) pins.

The DRV8329-Q1 devices integrate low-side current sense amplifier that allow current sensing for sum of current from all three phases of the drive stage.

A low-power sleep mode is provided to achieve low quiescent current by shutting down most of the internal circuitry. Internal protection functions are provided for undervoltage lockout, GVDD fault, MOSFET overcurrent, MOSFET short circuit, and overtemperature. Fault conditions are indicated on nFAULT pin.

The DRV8329-Q1 family of devices is an integrated gate driver for three-phase applications. The devices provide three half-bridge gate drivers, each capable of driving high-side and low-side N-channel power MOSFETs. The device generates the correct gate drive voltages using an internal charge pump and enhances the high-side MOSFETs using a bootstrap circuit. A trickle charge pump is included to support 100% duty cycle. The Gate Drive architecture supports peak gate drive currents up to 1-A source and 2-A sink. The DRV8329-Q1 can operate from a single power supply and supports a wide input supply range of 4.5 to 60 V.

The 6x and 3x PWM modes allow for simple interfacing to controller circuits. The device has integrated accurate 3.3-V LDO that can be used to power external controller and can be used as reference for CSA. The configuration settings for the device are configurable through hardware (H/W) pins.

The DRV8329-Q1 devices integrate low-side current sense amplifier that allow current sensing for sum of current from all three phases of the drive stage.

A low-power sleep mode is provided to achieve low quiescent current by shutting down most of the internal circuitry. Internal protection functions are provided for undervoltage lockout, GVDD fault, MOSFET overcurrent, MOSFET short circuit, and overtemperature. Fault conditions are indicated on nFAULT pin.

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* 数据表 DRV8329-Q1 4.5 to 60 V Three-phase BLDC Gate Driver 数据表 PDF | HTML 2023年 3月 7日
应用手册 所选封装材料的热学和电学性质 2008年 10月 16日

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DRV8329AEVM — DRV8329A 三相 BLDC 栅极驱动器评估模块

DRV8329AEVM 是一款基于 DRV8329A 栅极驱动器(适用于 BLDC 电机)的 30A 三相无刷直流驱动级。DRV8329 包含三个二极管用于自举操作,因此无需使用外部二极管。该器件包含用于低侧电流测量的电流分流放大器、80mA LDO、死区时间控制引脚、VDS 过流电平引脚和栅极驱动器关断引脚。EVM 包含用于评估这些设置的开关、电位计和电阻器,可面向 DRV8329 器件 A 型 (6x PWM) 和 B 型 (3x PWM) 进行配置。

可向此 EVM 提供高达 60V 的电压,DRV8329 的集成 LDO 可为自举 GVDD 电源提供所需的栅极电压。包含所有电源的状态 (...)

用户指南: PDF | HTML
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包含信息:
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息:
  • 制造厂地点
  • 封装厂地点

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