产品详情

Sample rate (max) (Msps) 200 Resolution (Bits) 10 Number of input channels 2 Interface type Parallel CMOS, Parallel LVDS Analog input BW (MHz) 900 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 1.5 Power consumption (typ) (mW) 450 Architecture Pipeline SNR (dB) 59.9 ENOB (bit) 9.65 SFDR (dB) 82 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 200 Resolution (Bits) 10 Number of input channels 2 Interface type Parallel CMOS, Parallel LVDS Analog input BW (MHz) 900 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 1.5 Power consumption (typ) (mW) 450 Architecture Pipeline SNR (dB) 59.9 ENOB (bit) 9.65 SFDR (dB) 82 Operating temperature range (°C) -40 to 85 Input buffer No
WQFN (NKA) 60 81 mm² 9 x 9
  • Single 1.8V Power Supply Operation.
  • Power Scaling with Clock Frequency.
  • Internal Sample-and-Hold.
  • Internal or External Reference.
  • Power Down Mode.
  • Offset Binary or 2's Complement Output Data Format.
  • LVDS or CMOS Output Signals.
  • 60-pin WQFN Package, (9x9x0.8mm, 0.5mm Pin-Pitch)
  • Clock Duty Cycle Stabilizer.
  • IF Sampling Bandwidth > 900MHz.

Key Specifications

  • Resolution 10 Bits
  • Conversion Rate 200 MSPS
  • ENOB 9.6 bits (typ) @Fin=70 MHz
  • SNR 59.9 dBFS (typ) @Fin=70 MHz
  • SINAD 59.9 dBFS (typ) @Fin=70 MHz
  • SFDR 82 dBFS (typ) @Fin=70 MHz
  • LVDS Power 450mW (typ) @Fs=200 MSPS
  • CMOS Power 280mW (typ) @Fs=170 MSPS
  • Operating Temp. Range −40°C to +85°C.

All trademarks are the property of their respective owners.

  • Single 1.8V Power Supply Operation.
  • Power Scaling with Clock Frequency.
  • Internal Sample-and-Hold.
  • Internal or External Reference.
  • Power Down Mode.
  • Offset Binary or 2's Complement Output Data Format.
  • LVDS or CMOS Output Signals.
  • 60-pin WQFN Package, (9x9x0.8mm, 0.5mm Pin-Pitch)
  • Clock Duty Cycle Stabilizer.
  • IF Sampling Bandwidth > 900MHz.

Key Specifications

  • Resolution 10 Bits
  • Conversion Rate 200 MSPS
  • ENOB 9.6 bits (typ) @Fin=70 MHz
  • SNR 59.9 dBFS (typ) @Fin=70 MHz
  • SINAD 59.9 dBFS (typ) @Fin=70 MHz
  • SFDR 82 dBFS (typ) @Fin=70 MHz
  • LVDS Power 450mW (typ) @Fs=200 MSPS
  • CMOS Power 280mW (typ) @Fs=170 MSPS
  • Operating Temp. Range −40°C to +85°C.

All trademarks are the property of their respective owners.

The ADC10DV200 is a monolithic analog-to-digital converter capable of converting two analog input signals into 10-bit digital words at rates up to 200 Mega Samples Per Second (MSPS). The digital output mode is selectable and can be either differential LVDS or CMOS signals. This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize die size and power consumption while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 900MHz. Fabricated in core CMOS process, the ADC10DV200 may be operated from a single 1.8V power supply. The ADC10DV200 achieves approximately 9.6 effective bits at Nyquist and consumes just 280mW at 170MSPS in CMOS mode and 450mW at 200MSPS in LVDS mode. The power consumption can be scaled down further by reducing sampling rates.

The ADC10DV200 is a monolithic analog-to-digital converter capable of converting two analog input signals into 10-bit digital words at rates up to 200 Mega Samples Per Second (MSPS). The digital output mode is selectable and can be either differential LVDS or CMOS signals. This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize die size and power consumption while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 900MHz. Fabricated in core CMOS process, the ADC10DV200 may be operated from a single 1.8V power supply. The ADC10DV200 achieves approximately 9.6 effective bits at Nyquist and consumes just 280mW at 170MSPS in CMOS mode and 450mW at 200MSPS in LVDS mode. The power consumption can be scaled down further by reducing sampling rates.

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类型 标题 下载最新的英语版本 日期
* 数据表 Dual 10-bit, 200 MSPS Low-Power A/D Converter with Parallel LVDS/CMOS Outputs 数据表 (Rev. A) 2013年 4月 18日
应用手册 Drivng HSpeed ADCs w/LMH6521 DVGA for High IF AC-Coupled Apps (Rev. A) 2013年 4月 26日
用户指南 ADC10/11DV200, 10/11-Bit, 200 Msps A/D Converter User Guide 2012年 2月 20日

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高速 ADC (≥10MSPS)
ADC08D1020 8 位、双路 1.0GSPS 或单路 2.0GSPS 模数转换器 (ADC) ADC08D1520 8 位、双路 1.5GSPS 或单路 3.0GSPS 模数转换器 (ADC) ADC10D1000 10 位、双通道 1.0GSPS 或单路 2.0GSPS 模数转换器 (ADC) ADC10D1500 10 位、双通道 1.5GSPS 或单通道 3.0GSPS 模数转换器 (ADC) ADC10DV200 双通道、10 位、200MSPS 模数转换器 (ADC) ADC12D1000 12 位、双通道 1.0GSPS 或单通道 2.0GSPS 模数转换器 (ADC) ADC12D1000RF 12 位、双通道 1.0GSPS 或单通道 2.0GSPS 射频采样模数转换器 (ADC) ADC12D1600 12 位、双通道 1.6GSPS 或单通道 3.2GSPS 模数转换器 (ADC) ADC12D1600RF 12 位双通道 1.6GSPS 或单通道 3.2GSPS 射频采样模数转换器 (ADC) ADC12D1800 12 位、双通道 1.8GSPS 或单通道 3.6GSPS 模数转换器 (ADC) ADC12D1800RF 12 位、双通道 1.8GSPS 或单通道 3.6GSPS、射频采样模数转换器 (ADC) ADC12D500RF 12 位、双通道 500MSPS 或单通道 1.0GSPS 射频采样模数转换器 (ADC) ADC12D800RF 12 位、双通道 800MSPS 或单通道 1.6GSPS 射频采样模数转换器 (ADC) ADC14DC080 双通道、14 位、80MSPS、1.0GHz 输入带宽模数转换器 (ADC) ADC16DV160 双通道、16 位、160MSPS 模数转换器 (ADC) ADC16V130 16 位、130MSPS 模数转换器 (ADC)
硬件开发
评估板
ADC08D1520RB ADC08D1520RB:低功耗、8 位、双路 1.5 GSPS 或单路 3.0 GSPS 模数转换器参考板 ADC12D1600RB 12 位双路 1.6/1.8 GSPS 或单路 3.2/3.6 GSPS A/D 转换器参考板 ADC16DV160HFEB ADC16DV160HFEB 评估板 LM98640CVAL 具有 LVDS 输出的双通道、14 位、40 MSPS 模拟前端 WAVEVSN-BRD-5.1 WaveVision 5 数据捕获板(5.1 版)
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WAVEVISION5 Data Acquisition and Analysis Software
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