SNLU293A December   2022  – December 2022 DS560DF810

 

  1.   DS560DF810EVM User's Guide
  2.   Trademarks
  3. 1Hardware Description and Setup
    1. 1.1 Required Hardware
    2. 1.2 General Hardware Test Setup Procedure
    3. 1.3 Hardware Configuration to use Onboard 25 MHz Oscillator for CAL_CLK_IN
  4. 2Software Description
    1. 2.1 Software Installation Sequence
    2. 2.2 Latte Functional Overview
    3. 2.3 Useful Latte Short-Cuts
    4. 2.4 DS560DF810EVM Initialization Through the Latte GUI
      1. 2.4.1 Connect Latte to Board
      2. 2.4.2 Compile Libraries
      3. 2.4.3 Example: Programming DS560DF810EVM for 26.5625 GBd PAM4 Test Case
      4. 2.4.4 Retimer Configuration
      5. 2.4.5 Retimer “Useful Functions” (Contained in the usefulFunctions.py Latte Script)
      6. 2.4.6 Vertical Eye Monitor
  5. 3Test Case Examples
    1. 3.1 Transmitter Test Case – EVM Board Output Evaluation for 26.5625 GBd PAM4 Data
    2. 3.2 Receiver Test Case – High Loss Input Channel to Retimer EVM, 26.5625 GBd PAM4
  6. 4Supplemental Documents
  7. 5EVM Cable Assemblies
  8. 6Revision History

1 DS560DF810EVM User's Guide

The DS560DF810 evaluation board module (EVM) allows the user to quickly evaluate both the high-speed and low-speed functionality of the DS560DF810 retimer. The DS560DF810 is an 8-channel multi-rate retimer with integrated signal conditioning. It supports retimed operation for PAM4 and NRZ data rates from 19.6 to 28.9 GBd. Integrated physical AC coupling capacitors (both TX and RX) eliminate the need for external capacitors on the PCB. The DS560DF810 relies on two power supply voltages, 1.2 V and 1.8 V, managed on the EVM through an onboard power tree.

The advanced equalization features of the DS560DF810 include a low-jitter 4-tap transmit finite impulse response (FIR) filter, as well as receive adaptive continuous-time linear equalizer (CTLE), decision feedback equalizer (DFE) and feed forward equalizer. This comprehensive equalization enables reach extension for lossy interconnects and backplanes with multiple connectors as well as crosstalk. The integrated CDR function is ideal for front-port optical module applications to reset the jitter budget and retime the high-speed serial data. The DS560DF810 implements a 2×2 cross-point on each channel pair, providing the host with both lanes crossing and fanout options.

The DS560DF810 can be configured through its default I2C two-wire serial target mode, or it can configure itself from an external EEPROM through its controller mode. On-chip eye monitor and PRBS generator and checker functions allow for comprehensive in-system diagnostics.