ZHCSHO1D November   2018  – January 2019 LMG1210

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
    1.     Device Images
      1.      简化的典型应用
  4. 修订历史记录
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
    8. 6.8 Timing Diagrams
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Bootstrap Diode Operation
      2. 7.3.2 LDO Operation
      3. 7.3.3 Dead Time Selection
      4. 7.3.4 Overtemperature Protection
      5. 7.3.5 High-Performance Level Shifter
      6. 7.3.6 Negative HS Voltage Handling
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Bypass Capacitor
        2. 8.2.2.2 Bootstrap Diode Selection
        3. 8.2.2.3 Handling Ground Bounce
        4. 8.2.2.4 Independent Input Mode
        5. 8.2.2.5 Computing Power Dissipation
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don'ts
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 文档支持
      1. 11.1.1 相关文档
    2. 11.2 接收文档更新通知
    3. 11.3 社区资源
    4. 11.4 商标
    5. 11.5 静电放电警告
    6. 11.6 术语表
  12. 12机械、封装和可订购信息

Do's and Don'ts

When using the LMG1210, DO:

  1. Read and fully understand the data sheet, including the application notes and layout recommendations.
  2. Use a four-layer board and place the return power path on an inner layer to minimize power-loop inductance.
  3. Use small, surface-mount bypass and bus capacitors to minimize parasitic inductance.
  4. Use the proper size decoupling capacitors and place them close to the IC as described in the Layout Guidelines section.
  5. Use common-mode chokes for the input signals to reduce ground bounce noise. If not, ensure the signal source is connected to the signal VSS plane which is tied to the power source only at the LMG1210 IC.

To avoid issues in your system when using the LMG1210, DON'T:

  1. Use a single-layer or two-layer PCB for the LMG1210 as the power-loop and bypass capacitor inductances will be excessive and prevent proper operation of the IC.
  2. Reduce the bypass capacitor values below the recommended values.
  3. Allow the device to experience pin transients above 200 V as they may damage the device.
  4. Drive the IC from a controller with a separate ground connection than the VSS pin of the IC, unless connecting though a CMC.