ISO1211 和 ISO1212 器件是隔离式 24V 至 60V 数字输入接收器,符合 IEC 61131-2 1 类、2 类和 3 类特性标准。这些器件可以在可编程逻辑控制器 (PLC)、电机控制、电网基础设施和其他工业应用中实现 9V 至 300V 直流和交流数字输入 模块。不同于具有分立式、不精确电流限制电路的传统光耦合器解决方案,ISO121x 器件提供具有精确电流限制的简单低功耗解决方案,可实现紧凑型和高密度 I/O 模块的设计。这些器件不需要现场侧电源,可配置为拉电流或灌电流输入。
ISO121x 器件的工作电压范围为 2.25V 至 5.5V,支持 2.5V、3.3V 和 5V 控制器。具有反极性保护的 ±60V 输入容差有助于确保输入引脚在可忽略的反向电流发生故障时受到保护。这些器件支持高达 4Mbps 的数据速率,可通过 150ns 的最小脉冲宽度,从而实现高速运行。ISO1211 器件适用于需要通道间隔离功能的设计,而 ISO1212 器件适用于多通道空间受限的设计。
与传统解决方案相比,ISO121x 器件减少了组件数量,简化了系统设计,提高了性能,降低了电路板温度。有关详细信息,请参阅《如何简化隔离式 24V PLC 数字输入模块设计》TI 技术手册、《如何提高电机驱动中的隔离式数字输入的速度和可靠性》TI 技术手册以及《如何设计用于 ±48V、110V 和 240V 直流和交流检测的隔离式比较器》TI 技术手册。
器件型号 | 封装 | 封装尺寸(标称值) |
---|---|---|
ISO1211 | SOIC (8) | 4.90mm × 3.91mm |
ISO1212 | SSOP (16) | 4.90mm × 3.90mm |
Changes from D Revision (March 2018) to E Revision
Changes from C Revision (February 2018) to D Revision
Changes from B Revision (September 2017) to C Revision
Changes from A Revision (September 2017) to B Revision
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NO. | NAME | ||
1 | VCC1 | — | Power supply, side 1 |
2 | EN | I | Output enable. The output pin on side 1 is enabled when the EN pin is high or open. The output pin on side 1 is in the high-impedance state when the EN pin is low. In noisy applications, tie the EN pin to VCC1. |
3 | OUT | O | Channel output |
4 | GND1 | — | Ground connection for VCC1 |
5 | SUB | — | Internal connection to input chip substrate. Leave this pin unconnected on the board. |
6 | FGND | — | Field-side ground |
7 | IN | I | Field-side current input |
8 | SENSE | I | Field-side voltage sense |
PIN | I/O | Description | |
---|---|---|---|
NO. | NAME | ||
1 | GND1 | — | Ground connection for VCC1 |
2 | VCC1 | — | Power supply, side 1 |
3 | EN | I | Output enable. The output pins on side 1 are enabled when the EN pin is high or open. The output pins on side 1 are in the high-impedance state when the EN pin is low. In noisy applications, tie the EN pin to VCC1. |
4 | OUT1 | O | Channel 1 output |
5 | OUT2 | O | Channel 2 output |
6 | NC | — | Not connected |
7 | |||
8 | GND1 | — | Ground connection for VCC1 |
9 | FGND2 | — | Field-side ground, channel 2 |
10 | IN2 | I | Field-side current input, channel 2 |
11 | SENSE2 | I | Field-side voltage sense, channel 2 |
12 | SUB2 | — | Internal connection to input chip 2 substrate. Leave this pin unconnected on the board. |
13 | SUB1 | — | Internal connection to input chip 1 substrate. Leave this pin unconnected on the board. |
14 | FGND1 | — | Field-side ground, channel 1 |
15 | IN1 | I | Field-side current input, channel 1 |
16 | SENSE1 | I | Field-side voltage sense, channel 1 |
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
VCC1 | Supply voltage, control side | –0.5 | 6 | V | |
VOUTx,
VEN |
Voltage on OUTx pins and EN pin | –0.5 | VCC1 + 0.5(2) | V | |
IO | Output current on OUTx pins | –15 | 15 | mA | |
VINx, VSENSEx | Voltage on IN and SENSE pins | –60 | 60 | V | |
V(ISO,FUNC) | Functional isolation between channels in ISO1212 on the field side | –60 | 60 | V | |
TJ | Junction temperature | –40 | 150 | °C | |
Tstg | Storage temperature | –65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2000 | V |
Charged device model (CDM), per JEDEC specification JESD22-C101(2) | ±1000 |