SPRZ342O January   2011  – April 2021 TMS320F28062 , TMS320F28062-Q1 , TMS320F28062F , TMS320F28062F-Q1 , TMS320F28063 , TMS320F28064 , TMS320F28065 , TMS320F28066 , TMS320F28066-Q1 , TMS320F28067 , TMS320F28067-Q1 , TMS320F28068F , TMS320F28068M , TMS320F28069 , TMS320F28069-Q1 , TMS320F28069F , TMS320F28069F-Q1 , TMS320F28069M , TMS320F28069M-Q1

 

  1.   Abstract
  2. 1Usage Notes and Advisories Matrices
    1. 1.1 Usage Notes Matrix
    2. 1.2 Advisories Matrix
  3. 2Nomenclature, Package Symbolization, and Revision Identification
    1. 2.1 Device and Development Support Tool Nomenclature
    2. 2.2 Devices Supported
    3. 2.3 Package Symbolization and Revision Identification
  4. 3Silicon Revision B Usage Notes and Advisories
    1. 3.1 Silicon Revision B Usage Notes
      1. 3.1.1 PIE: Spurious Nested Interrupt After Back-to-Back PIEACK Write and Manual CPU Interrupt Mask Clear
      2. 3.1.2 CAN Bootloader: Internal Oscillator Tolerance is Not Sufficient for CAN Operation at High Temperatures
      3. 3.1.3 FPU32 and VCU Back-to-Back Memory Accesses
      4. 3.1.4 Caution While Using Nested Interrupts
      5. 3.1.5 Flash: MAX "Program Time” and “Erase Time” in Revision G of the TMS320F2806x Piccolo™ Microcontrollers Data Manual are only Applicable for Devices Manufactured After January 2018
    2. 3.2 Silicon Revision B Advisories
      1.      Advisory
      2.      Advisory
      3.      Advisory
      4.      Advisory
      5.      Advisory
      6.      Advisory
      7.      Advisory
      8.      Advisory
      9.      Advisory
      10.      Advisory
      11.      Advisory
      12.      Advisory
      13.      Advisory
      14.      Advisory
      15.      Advisory
      16.      Advisory
      17.      Advisory
      18.      Advisory
      19.      Advisory
      20.      Advisory
      21.      Advisory
      22.      Advisory
      23.      Advisory
      24.      Advisory
      25.      Advisory
      26.      Advisory
      27.      Advisory
  5. 4Silicon Revision A Usage Notes and Advisories
    1. 4.1 Silicon Revision A Usage Notes
    2. 4.2 Silicon Revision A Advisories
  6. 5Silicon Revision 0 Usage Notes and Advisories
    1. 5.1 Silicon Revision 0 Usage Notes
    2. 5.2 Silicon Revision 0 Advisories
      1.      Advisory
      2.      Advisory
      3.      Advisory
  7. 6Documentation Support
  8. 7Trademarks
  9. 8Revision History

1.2 Advisories Matrix

Table 1-2 Advisories Matrix
MODULE DESCRIPTION SILICON REVISIONS AFFECTED
0 A B
FPU FPU: CPU-to-FPU Register Move Operation Followed By F32TOUI32, FRACF32, or UI16TOF32 Operations Yes Yes Yes
FPU FPU: FPU-to-CPU Register Move Operation Preceded by Any FPU 2p Operation Yes Yes Yes
FPU FPU: LUF, LVF Flags are Invalid for the EINVF32 and EISQRTF32 Instructions Yes Yes Yes
ADC ADC: Initial Conversion Yes Yes Yes
ADC ADC: Temperature Sensor Minimum Sample Window Requirement Yes Yes Yes
ADC ADC: ADC Result Conversion When Sampling Ends on 14th Cycle of Previous Conversion, ACQPS = 6 or 7 Yes Yes Yes
ADC ADC: Offset Self-Recalibration Requirement Yes Yes Yes
ADC ADC: ADC Revision Register (ADCREV) Limitation Yes Yes Yes
ADC ADC: ADC can Become Non-Responsive When ADCNONOVERLAP or RESET is Written During a Conversion Yes Yes Yes
Memory Memory: Prefetching Beyond Valid Memory Yes Yes Yes
GPIO GPIO: GPIO Qualification Yes Yes Yes
eCAN eCAN: Abort Acknowledge Bit Not Set Yes Yes Yes
eCAN eCAN: Unexpected Cessation of Transmit Operation Yes Yes Yes
eQEP eQEP: Missed First Index Event Yes Yes Yes
eQEP eQEP: eQEP Inputs in GPIO Asynchronous Mode Yes Yes Yes
eQEP eQEP: Incorrect Operation of EQEP2B Function on GPIO25 Pin (This advisory is applicable for the 100-pin packages only.) Yes Yes Yes
eQEP eQEP: Position Counter Incorrectly Reset on Direction Change During Index Yes Yes Yes
Watchdog Watchdog: Incorrect Operation of CPU Watchdog When WDCLK Source is OSCCLKSRC2 Yes Yes Yes
Oscillator Oscillator: CPU Clock Switching to INTOSC2 May Result in Missing Clock Condition After Reset Yes Yes Yes
DMA DMA: ePWM Interrupt Trigger Source Selection via PERINTSEL is Incorrect Yes Yes Yes
CLA CLA: Memory and Clock Configuration (MMEMCFG) Register Bits 8, 9, and 10 are Write-Only Yes Yes Yes
ePWM ePWM: SWFSYNC Does Not Properly Propagate to Subsequent ePWM Modules or Output on EPWMSYNCO Pin Yes Yes Yes
ePWM ePWM: An ePWM Glitch can Occur if a Trip Remains Active at the End of the Blanking Window Yes Yes Yes
ePWM ePWM: Trip Events Will Not be Filtered by the Blanking Window for the First 3 Cycles After the Start of a Blanking Window Yes Yes Yes
VCU VCU: First CRC Calculation May Not be Correct Yes Yes Yes
VCU VCU: Overflow Flags Not Set Properly Yes
USB USB: USB DMA Event Triggers Cause Too Many DMA Transfers Yes Yes Yes
USB USB: Host Mode — Cannot Communicate With Low-Speed Device Through a Hub Yes Yes Yes
USB USB: End-of-Packet Symbol Not Generated Yes
Boot ROM Boot ROM: Boot ROM GetMode( ) Boot Option Selection Yes
Note:

Revision B silicon was released with an updated read-only-memory (ROM) section to support the InstaSPIN-FOC™-enabled versions of F2806x (F28062F, 68F, 69F) and the InstaSPIN-MOTION™-enabled versions of F2806x (F28068M, 69M). Besides the updated ROM, Revision B silicon is functionally equivalent to Revision A silicon. All standard (non-InstaSPIN-enabled) F2806x devices ship as Revision A.