SPRUJ85B April   2024  – January 2026

PRODUCTION DATA  

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1LaunchPad Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Device Information
      1. 1.3.1 System Architecture Overview
      2. 1.3.2 Security
      3. 1.3.3 BoosterPacks
      4. 1.3.4 Component Identification
    4. 1.4 Compliance
  6. 2Hardware Description
    1. 2.1  Board Setup
      1. 2.1.1 Power Requirements
        1. 2.1.1.1 Power Input Using USB Type-C Connector
        2. 2.1.1.2 Power Status LEDs
        3. 2.1.1.3 Power Tree
      2. 2.1.2 Push Buttons
      3. 2.1.3 Boot mode Selection
      4. 2.1.4 IO Expander
    2. 2.2  Functional Block Diagram
    3. 2.3  GPIO Mapping
    4. 2.4  Reset
    5. 2.5  Clock
    6. 2.6  Memory Interfaces
      1. 2.6.1 OSPI
      2. 2.6.2 MMC
      3. 2.6.3 eMMC
      4. 2.6.4 Board ID EEPROM
    7. 2.7  Ethernet Interface
      1. 2.7.1 Ethernet PHY #1 - CPSW RGMII/ICSSM
      2. 2.7.2 Ethernet PHY #2 - CPSW RGMII/ICSSM
      3. 2.7.3 LED Indication in RJ45 Connector
    8. 2.8  I2C
    9. 2.9  Industrial Application LEDs
    10. 2.10 SPI
    11. 2.11 UART
    12. 2.12 MCAN
    13. 2.13 FSI
    14. 2.14 JTAG
    15. 2.15 TIVA and Test Automation Header
    16. 2.16 LIN
    17. 2.17 ADC and DAC
    18. 2.18 EQEP and SDFM
    19. 2.19 EPWM
    20. 2.20 BoosterPack Headers
    21. 2.21 Pinmux Mapping
  7. 3Hardware Design Files
    1. 3.1 Schematics
    2. 3.2 PCB Layouts
    3. 3.3 Bill of Materials (BOM)
  8. 4Compliance Information
    1. 4.1 Compliance and Certifications
  9. 5Additional Information
    1.     Trademarks
    2. 5.1 Sitara MCU+ Academy
    3. 5.2 Hardware Changes from RevE2 to RevA
    4. 5.3 Known Board Changes/Issues
      1. 5.3.1 OSPI DQS and LBCLK nets swap
      2. 5.3.2 XDS110 Debugger Bricking Issue
      3. 5.3.3 eMMC CMD and CLK nets swap
  10. 6Related Documentation
    1. 6.1 Supplemental Content
  11. 7References
  12. 8Revision History

5.2 Hardware Changes from RevE2 to RevA

The below are the changes done from Revision-E2 of LP-AM263P to Revision-A of LP-AM263P

  1. The Boosterpack pins have been updated such that the pins PR0_PRU0_GPIO13 and PR0_PRU0_GPIO14 which were muxed on Boosterpack pins J6.54 and J6.55 are now muxed onto pins J2.14 and J2.15 pins. This is made to match the BOOSTXL-IOLINKM-8 Boosterpack requirements. Please note that here the alternate function can be selected based on different Muxes and their respective individual controls.
  2. The OSPI0 flash footprint has been made compatible with a standard OSPI PSRAM part footprint. Now a PSRAM part can also be mounted onto the U7(OSPI0 flash) footprint for evaluation. The resistor R443 must be mounted and R444 must be made DNI for evaluating an OSPI PSRAM part. Please refer LP-AM263P RevA schematics for more details.