SPRABA5D January 2014 – January 2019 AM1802 , AM1802 , AM1806 , AM1806 , AM1808 , AM1808 , AM1810 , AM1810
The MMC/SD register is shown in Figure 34 and described in Table 22.
31 | 16 | 15 | 8 | 7 | 0 |
Arg1 | Reserved | DIV4 | CLKRT |
Bit | Field | Value | Description |
---|---|---|---|
31-16 | Reserved | 0 | Reserved |
15-8 | DIV4 | Value to be programmed to DIV4 field of MMCCLK register | |
7-0 | CLKRT | Value to be programmed to CLKRT field of MMCCLK register |