SNAU274 December   2021

 

  1. 1ADC128S102EVM Overview
    1. 1.1 Analog Input Circuit
    2. 1.2 Power Supply
    3. 1.3 Digital Bus Connections
  2. 2Hardware and Software Installation
  3. 3Graphical User Interface (GUI)
    1. 3.1 User Configuration
      1. 3.1.1 Interface Configuration
      2. 3.1.2 Clock Frequency and Sample Data Rate
    2. 3.2 Time Domain
    3. 3.3 Spectral Analysis
    4. 3.4 Histogram Analysis
  4. 4Board Layout
  5. 5Schematics
  6. 6ADC128S102EVM Bill of Materials

Clock Frequency and Sample Data Rate

The final two configuration options available, the SCLK frequency (Hz) and the data rate (SPS), dictate the sample rate for the device. The sample rate can be defined by inputting the clock frequency to be used, or the desired sample rate. When either is modified, the corresponding parameter reflects the change.