SLVUD87 July   2026 TPS65214

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2PDN and Sequence Diagrams
    1. 2.1 TPS6521431 Power Sequence and Example Block Diagram
  6. 3NVM Device Settings
    1. 3.1  Device ID
    2. 3.2  Enable Settings
    3. 3.3  Regulator Voltage Settings
    4. 3.4  Sequence Settings
      1. 3.4.1 Power-Up Sequence
      2. 3.4.2 Power-Down Sequence
    5. 3.5  EN / PB / VSENSE Settings
    6. 3.6  Multi-Function Pin Settings
    7. 3.7  Over-Current Deglitch
    8. 3.8  Mask Settings
    9. 3.9  Discharge Check
    10. 3.10 Low Power Mode
  7. 4Revision History

2.1 TPS6521431 Power Sequence and Example Block Diagram

TPS6521431 Power Sequence Figure 2-1 TPS6521431 Power Sequence
TPS6521431 Example Block Diagram Figure 2-2 TPS6521431 Example Block Diagram