SLVUC93 September   2021 TPSM63606

 

  1.   Trademarks
  2. 1High-Density EVM Description
    1. 1.1 Typical Applications
    2. 1.2 Features and Electrical Performance
  3. 2EVM Performance Specifications
  4. 3EVM Photo
  5. 4Test Setup and Procedure
    1. 4.1 EVM Connections
    2. 4.2 EVM Setup
    3. 4.3 Test Equipment
    4. 4.4 Recommended Test Setup
      1. 4.4.1 Input Connections
      2. 4.4.2 Output Connections
    5. 4.5 Test Procedure
      1. 4.5.1 Line/Load Regulation and Efficiency
  6. 5Test Data and Performance Curves
    1. 5.1 Efficiency and Load Regulation Performance
    2. 5.2 Waveforms
    3. 5.3 Bode Plot
    4. 5.4 Thermal Performance
    5. 5.5 EMI Performance
  7. 6EVM Documentation
    1. 6.1 Schematic
    2. 6.2 Bill of Materials
    3. 6.3 PCB Layout
    4. 6.4 Assembly Drawings
    5. 6.5 Multi-Layer Stackup
  8. 7Device and Documentation Support
    1. 7.1 Device Support
      1. 7.1.1 Development Support
        1. 7.1.1.1 Custom Design With WEBENCH® Tools
    2. 7.2 Documentation Support
      1. 7.2.1 Related Documentation

1.2 Features and Electrical Performance

  • Complete 6-A buck power stage with integrated power MOSFETs, buck inductor, and PWM controller
  • Wide input voltage operating range of 3 V to 36 V (absolute maximum rating of 42 V)
  • Default output voltage and switching frequency of 5 V and 1 MHz, respectively. Use jumper options for alternative configurations:
    • 1.8 V, 500 kHz
    • 2.5 V, 500 kHz
    • 3.3 V, 750 kHz
    • 12 V, 2 MHz
  • High efficiency across a wide load-current range
    • Full-load efficiency of 92% and 91.4% at VIN = 12 V and 24 V, respectively
    • 95% and 93.5% efficiencies at half-rated load, VIN = 12 V and 24 V, respectively
    • External bias option reduces no-load supply current and enhances thermal performance
  • Improved EMI performance for noise-sensitive applications
    • Meets CISPR 11 and CISPR 32 Class B EMI standards for both conducted and radiated emissions
    • Input π-stage EMI filter with electrolytic capacitor for parallel damping
    • Parallel input and output paths with symmetrical capacitor layouts minimize radiated field coupling
    • Clock synchronization and FPWM mode provide constant switching frequency across the full load range
    • Integrated input, VCC, and bootstrap capacitors enable low-noise switching performance
    • The TPSM63606SEVM includes pseudo-random spread spectrum (PRSS) for lower peak emissions
  • Peak current-mode control architecture enables fast line and load transient response
    • Integrated loop compensation and frequency-proportional slope compensation
  • Inherent protection features for robust and reliable design
    • Overcurrent protection (OCP) with peak and valley current limits
    • Thermal shurdown protection with hysteresis
    • PGOOD indicator with 49.9-kΩ pullup resistor to VOUT
    • Resistor-programmable input voltage UVLO set to turn on and off at VIN of 5.1 V and 3.65 V, respectively
  • Fully assembled, tested and proven 4-layer PCB design with 76-mm × 63-mm total footprint