SLVU157A March   2006  – October 2021 TPS5430 , TPS5431

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Background
    2. 1.2 Performance Specification Summary
    3. 1.3 Modifications
      1. 1.3.1 Output Voltage Set Point
  3. 2Test Setup and Results
    1. 2.1 Input/Output Connections
    2. 2.2 Efficiency
    3. 2.3 Output Voltage Load Regulation
    4. 2.4 Output voltage Line Regulation
    5. 2.5 Load Transients
    6. 2.6 Loop Characteristics
    7. 2.7 Output Voltage Ripple
    8. 2.8 Input Voltage Ripple
    9. 2.9 Powering Up
  4. 3Board Layout
    1. 3.1 Layout
  5. 4Schematic and Bill of Materials
    1. 4.1 Schematic
    2. 4.2 Bill of Materials
  6. 5Revision History

2.9 Powering Up

The start-up waveform is shown in Figure 2-15. The top trace shows ENA, and the bottom trace shows Vout. Initially, the output is inhibited by using a jumper at JP1 to tie EN to GND. When the jumper is removed, ENA is released. When the ENA voltage reaches the enable-threshold voltage of 1.06 V, the start-up sequence begins and the internal reference voltage begins to ramp up at the internally set rate towards 1.221 V and the output voltage ramps up to the externally set value of 5 V. The start-up waveform is the same for both the TPS5430EVM-173 and the TPS5431EVM-173.

GUID-BCE91E08-6902-4A18-B624-F48FBCDB3070-low.gifFigure 2-15 TPS5430 and TPS5431 Start-Up