SLVK262A February   2026  – May 2026 TPS7H5030-SEP , TPS7H5031-SEP

 

  1.   1
  2.   2
  3.   Trademarks
  4. 1 Introduction
  5. 2 Single-Event Effects (SEE)
  6. 3 Device and Test Board Information
  7. 4 Irradiation Facility and Setup
  8. 5 LETEFF and Range Calculation
  9. 6 Test Setup and Procedures
  10. 7 Destructive Single-Event Effects (DSEE)
    1. 7.1 Single-Event Latch-up (SEL) Results
    2. 7.2 Single-Event Burnout (SEB) and Single-Event Gate Rupture (SEGR) Results
  11. 8 Single-Event Transients (SET)
    1. 8.1 Open-Loop Configuration
  12. 9 Event Rate Calculations
  13. 10Summary
  14.   A References
  15.   B Revision History

2 Single-Event Effects (SEE)

The primary concern for the TPS7H503x-SEP is the robustness against the destructive single-event effects (DSEE): single-event latch-up (SEL), single-event burnout (SEB), and single-event gate rupture (SEGR). In mixed technologies such as the BiCMOS process used on the TPS7H503x-SEP, the CMOS circuitry introduces a potential for SEL susceptibility.

SEL can occur if excess current injection caused by the passage of an energetic ion is high enough to trigger the formation of a parasitic cross-coupled PNP and NPN bipolar structure (formed between the p-sub and n-well and n+ and p+ contacts) [1, 2]. The parasitic bipolar structure initiated by a single event creates a high-conductance path (inducing a steady-state current that is typically orders of magnitude higher than the normal operating current) between power and ground that persists (is “latched”) until power is removed, the device is reset, or until the device is destroyed by the high-current state. The TPS7H503x-SEP was tested for SEL at the maximum recommended operating conditions of VIN = PVIN = 14V and a fixed VLDO = 5V. During testing of six devices, the TPS7H503x-SEP did not exhibit any SEL with heavy-ions with LETEFF = 48MeV × cm2 /mg at flux of approximately 105 ions/cm2/s, fluence of approximately 107 ions/cm2, and a die temperature of 125°C.

The TPS7H503x-SEP was evaluated for SEB/SEGR at a maximum voltage of 14V in the enabled and disabled mode. Because it has been shown that the MOSFET susceptibility to burnout decrement with temperature [5], the device was evaluated while operating under room temperatures. The device was tested with no external thermal control device. The TPS7H503x-SEP was tested for SEB at the maximum recommended operating conditions of VIN=PVIN=14V and a fixed VLDO = 5V. The device was also tested for SEB Off by disabling the device. During the SEB/SEGR testing, not a single current event was observed, demonstrating that the TPS7H503x-SEP is SEB/SEGR-free up to LETEFF = 48MeV × cm2/mg at a flux of approximately 105 ions/cm2/s, fluences of approximately 107 ions/cm2, and a die temperature of approximately 25°C.

The TPS7H503x-SEP was characterized for SET at flux of approximately 1 × 105 ions/cm2/s, fluences of approximately 107 ions/cm2, and room temperature. The device was characterized at VIN of 12V. Heavy-ions with LETEFF of 48MeV × cm2/mg were used to characterize the transient performance. To see the SET results of the TPS7H503x-SEP, please refer to Single-Event Transients (SET).