SLLA475 December   2020 TCAN1144-Q1 , TCAN1146-Q1

 

  1. 1TCAN1144-Q1 and TCAN1146-Q1 Functional Safety Manual
  2. 2Trademarks
  3. 3Introduction
  4. 4TCAN114x-Q1 Hardware Component Functional Safety Capability
  5. 5Development Process for Management of Systematic Faults
    1. 5.1 TI New-Product Development Process
  6. 6TCAN1144-Q1 and TCAN1146-Q1 Component Overview
    1. 6.1 Targeted Applications
    2. 6.2 Hardware Component Functional Safety Concept
    3. 6.3 Functional Safety Constraints and Assumptions
  7. 7Description of Hardware Component Parts
    1. 7.1 CAN Transceiver
    2. 7.2 Digital Core
    3. 7.3 EEPROM
    4. 7.4 Power Control IP
      1. 7.4.1 Voltage Monitors
    5. 7.5 Thermal Shut Down
    6. 7.6 Digital Input/Outputs
  8. 8TCAN1144-Q1 and TCAN1146-Q1 Management of Random Faults
    1. 8.1 Fault Reporting
    2. 8.2 Functional Safety Mechanism Categories
    3. 8.3 Description of Functional Safety Mechanisms
      1. 8.3.1 CAN Communication
        1. 8.3.1.1 SM-1: CAN bus fault diagnostic
        2. 8.3.1.2 SM-2: Thermal shutdown; TSD
        3. 8.3.1.3 SM-3: CAN bus short circuit limiter, IOS
        4. 8.3.1.4 SM-4: CAN TXD pin dominant state timeout; tTXD_DTO
        5. 8.3.1.5 SM-17: CAN protocol
      2. 8.3.2 Supply Voltage Rail Monitoring
        1. 8.3.2.1 SM-5: VCC undervoltage; UVCC
        2. 8.3.2.2 SM-6: VSUP supply undervoltage; UVSUP
        3. 8.3.2.3 SM-7: VIO supply undervoltage; UVIO
      3. 8.3.3 SPI/Processor Communication
        1. 8.3.3.1 SM-8: Timout, Window or Q&A watchdog error - Normal mode
        2. 8.3.3.2 SM-9: SPI communication error; SPIERR
        3. 8.3.3.3 SM-10: Scratchpad write/read
        4. 8.3.3.4 SM-11: Sleep Wake Error Timer; tINACTIVE
      4. 8.3.4 Device Internal EEPROM
        1. 8.3.4.1 SM-12: Internal memory CRC; CRC_EEPROM
      5. 8.3.5 Floating Pins
        1. 8.3.5.1 SM-13: SCLK internal pull-up to VIO
        2. 8.3.5.2 SM-14: SDI internal pull-up to VIO
        3. 8.3.5.3 SM-15: nCS internal pull-up to VIO
        4. 8.3.5.4 SM-16: TXD internal pull-up to VIO
          1.        B Revision History

8.3.1 CAN Communication

The TCAN1144-Q1 and TCAN1146-Q1 are enhanced high-speed CAN FD transceivers supporting data rates up to 5 Mbps. These devices are configured using serial peripheral interface (SPI) in order to use all the features available. The devices support 1.8 V to 5 V processors by applying the appropriate voltage to the VIO pin, allowing lower voltage processors to be utilized.

The TCAN1144-Q1 and TCAN1146-Q1 provide CAN FD transceiver function: differential transmit capability to the bus and differential receive capability from the bus. The device includes many protection features providing device and CAN network robustness. The CAN bus has two logical states during operation: recessive and dominant.

Recessive bus state is when the bus is biased to a common mode of about 2.5 V via the high resistance internal input resistors of the receiver of each node on the bus across the termination resistors. Recessive is equivalent to logic high and is typically a differential voltage 0.5 V or less between CANH and CANL. Recessive state is also the idle state.

Dominant bus state is when the bus is driven differentially by one or more drivers. Current is induced to flow through the termination resistors and generate a differential voltage on the bus. Dominant is equivalent to logic low and is a differential voltage on the bus greater than the minimum threshold of 0.9 V for a CAN dominant. A dominant state overwrites the recessive state.

Devices safety mechanisms SM-1, SM-2, SM-3 and SM-4 are provided by the device itself while SM-17 is an inherent mechanism provided by CAN protocol.