SLAU748B October   2017  – September 2018 MSP432E401Y

 

  1.   SimpleLinkrep%#8482; Ethernet MSP432E401Y Microcontroller LaunchPad™ Development Kit (MSP-EXP432E401Y)
    1.     Trademarks
    2. 1 Board Overview
      1. 1.1 Kit Contents
      2. 1.2 Using the Ethernet LaunchPad Development Kit
      3. 1.3 Features
      4. 1.4 BoosterPack Plug-in Modules
      5. 1.5 Specifications
    3. 2 Hardware Description
      1. 2.1 Functional Description
        1. 2.1.1 Microcontroller
        2. 2.1.2 Ethernet Connectivity
          1. 2.1.2.1 RJ-45 Connections
        3. 2.1.3 USB Connectivity
        4. 2.1.4 Motion Control
        5. 2.1.5 User Switches and LEDs
        6. 2.1.6 BoosterPack Plug-in Modules and Headers
          1. 2.1.6.1 BoosterPack Plug-in Module Interface 1
          2. 2.1.6.2 BoosterPack Plug-in Module Interface 2
          3. 2.1.6.3 Breadboard Connection
          4. 2.1.6.4 Other Headers and Jumpers
        7. 2.1.7 Serial Bootloader
      2. 2.2 Power Management
        1. 2.2.1 Power Supplies
        2. 2.2.2 Low Power Modes
        3. 2.2.3 Clocking
        4. 2.2.4 Reset
      3. 2.3 Debug Interface
        1. 2.3.1 XDS-110 Debug Interface
        2. 2.3.2 External Debugger
        3. 2.3.3 Virtual COM Port
    4. 3 Software Development
      1. 3.1 Software Description
      2. 3.2 Source Code
      3. 3.3 Tool Options
      4. 3.4 Programming the Ethernet LaunchPad Development Kit
    5. 4 PCB Schematics
  2.   Revision History

2.1.6.2 BoosterPack Plug-in Module Interface 2

The second BoosterPack XL interface is located near the bottom of the board. This interface is fully compliant with the BoosterPack plug-in module standard, and adds features not covered by the BoosterPack plug-in module standard that enable operation with additional BoosterPack plug-in modules.

Using the jumpers JP4 and JP5, Controller Area Network (CAN) digital receive and transmit signals can be optionally routed to the BoosterPack Plug-in Module Interface 2 connector. In the default configuration, UART0 is used for the XDS-110 backchannel UART and CAN is not present on the BoosterPack plug-in module headers. In this configuration, the ROM serial bootloader can be used over the XDS-110 backchannel UART. When the jumpers are configured for CAN on the BoosterPack plug-in module interface, then UART2 must be used for the XDS-110 backchannel UART.

To comply with both the original and the new BoosterPack plug-in module standard, I2C is provided on both sides of the BoosterPack plug-in module connection. Use of I2C on the bottom left of the BoosterPack plug-in module connection is highly encouraged where possible, to be in compliance with the new BoosterPack plug-in module standard. To provide I2C capability on the right side of the connector, per the original standard, two 0-Ω resistors (R19 and R20) are used to combine the SPI and I2C signals. These signals are not shared with any other pins on the LaunchPad development kit and therefore removal of these zero-ohm resistors should not be required. Software should be certain that unused GPIO signals are configured as inputs.

Table 3 lists the BoosterPack plug-in module pins and the GPIO alternate functions available at each pin. The MSP432E401Y GPIO register GPIOPCTL values are shown for each configuration. The headers in this table are labeled from left to right in ten pin columns. J5 and J6 make up the outer BoosterPack standard pins, J7 and J8 make up the inner BoosterPack XL standard pins.

Table 3. BoosterPack 2 GPIO and Signal Muxing

Header Pin Standard Function GPIO MCU Pin Analog Digital Function (FPIOPCTL Bit Encoding)
1 2 3 5 6 7 8 11 13 14 15
J5 1 3.3 V
J5 2 Analog PD2 3 AIN13 – I2C8SCL T1CCP0 C2o – – – – – – SSI2Fss
J5 3 UART RX PP0 118 C2+ U6Rx – – – – – – – – – SSI3XDAT2
J5 4 UART TX PP1 119 C2- U6Tx – – – – – – – – – SSI3XDAT3
J5 5 GPIO (See JP4) PD4 125 AIN7 U2Rx – T3CCP0 – – – – – – – SSI1XDAT2
PA0 33 – U0Rx I2C9SCL T0CCP0 – – CANORx – – – – –
J5 6 Analog (See JP5) PD5 126 AIN6 U2Tx – T3CCP1 – – – – – – – SSI1XDAT3
PA1 34 – U0Tx I2C9SDA T0CCP1 – – CAN0Tx – – – – –
J5 7 SPI CLK PQ0 5 – – – – – – – – – – SSI3Clk EPI0S20
J5 8 GPIO PP4 105 – U3RTS U0DSR – – – – – – – USB0D7 –
J5 9 I2C SCL PN5 112 – U1RI U3CTS I2C2SCL – – – – – – – EPIO0S35
J5 10 I2C SDA PN4 111 – U1DTR U3RTS I2C2SDA – – – – – – – EPIO0S34
J7 21 5 V
J7 22 GND
J7 23 Analog PB4 121 AIN10 U0CTS I2C5SCL – – – – – – – – SSI1Fss
J7 24 Analog PB5 120 AIN11 U0RTS I2C5SDA – – – – – – – – SSI1Clk
J7 25 Analog PK0 18 AIN16 U4Rx – – – – – – – – – EPI0S0
J7 26 Analog PK1 19 AIN17 U4Tx – – – – – – – – – EPI0S1
J7 27 Analog PK2 20 AIN18 U4RTS – – – – – – – – – EPI0S2
J7 28 Analog PK3 21 AIN19 u4CTS – – – – – – – – – EPI0S3
J7 29 A out PA4 37 – U3Rx I2C7SCL T2CCP0 – – – – – – – SSI0XDAT0
J7 30 A out PA5 38 – U3Tx I2C7SDA T2CCP1 – – – – – – – SSI0XDAT1
J8 40 PWM PG1 50 – – I2C1SDA – – M0PWM5 – – – – – EPI0S10
J8 39 PWM PK4 63 – – I2C3SCL – EN0LED0 M0PWM6 – – – – – EPI0S32
J8 38 PWM PK5 62 – – I2C3SDA – EN0LED2 M0PWM7 – – – – – EPI0S31
J8 37 PWM PM0 78 – – – T2CCP0 – – – – – – – EPI0S15
J8 36 Capture PM1 77 – – – T2CCP1 – – – – – – – EPI0S14
J8 35 Capture PM2 76 – – – T3CCP0 – – – – – – – EPI0S13
J8 34 GPIO PH0 29 – U0RTS – – – – – – – – – EPI0S0
J8 33 GPIO PH1 30 – U0CTS – – – – – – – – – EPI0S1
J8 32 GPIO PK6 61 – – I2C4SCL – EN0LED1 M0FAULT1 – – – – – EPI0S25
J8 31 GPIO PK7 60 – U0RI I2C4SDA – RTCCLK M0FAULT2 – – – – – EPI0S24
J6 11 GND
J6 12 PWM PM7 71 TMPR0 U0RI – T5CCP1 – – – – – – – –
J6 13 GPIO PP5 106 – U3CTS I2C2SDL – – – – – – – USB0D6 –
J6 14 GPIO PA7 41 – U2Tx I2C6SDA T3CCP1 USB0PFLT – – – USB0EPEN SSI0XDAT3 – EPI0S9
J6 15 RESET
J6 16 SPI MOSI PQ2 11 – – – – – – – – – – SSI3XDAT0 EPI0S22
I2C PA3 36 – U4Tx I2C8SDA T1CCP1 – – – – – – – SSI0Fss
J6 17 SPI MISO PQ3 27 – – – – – – – – – – SSI3XDAT1 EPI0S23
I2C PA2 35 – U4Rx I2C8SCL T1CCP0 – – – – – – – SSI0Clk
J6 18 GPIO PP3 104 – U1CTS U0DCD – – – – – – – USB0DIR EPI0S30
J6 19 GPIO PQ1 6 – – – – – – – – – – SSI3Fss EPI0S21
J6 20 GPIO PM6 72 TMPR1 U0DSR – T5CCP0 – – – – – – – –