In a typical Audio ADC, the analog audio input signal is converted to digital by a delta-sigma modulator. The output of the modulator is then decimated to the required sampling rate and then sent to Audio Serial interface (ASI) bus. The ADC continuously digitizes the running audio input signal here, without resetting or flushing the memory of prior samples.

In applications like sensing, the measurements involve individually sampling very slow moving or noisy DC voltages. For such applications, the delta-sigma modulator digitizes the voltage into individual samples, and the device averages a certain number of captured samples and provides an output code. The number of samples that is averaged is the over-sampling ratio (OSR) of the ADC. In this mode of operation, referred to here as Incremental ADC (IADC), whenever a conversion is initiated, the internal memory is consistently reset and the ADC averages a freshly captured set of samples and provides the output digital code.