SLAAES1 April   2026 TAA5212 , TAC5112 , TAC5112-Q1 , TAC5212

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Detailed Description
    1. 2.1 What is an Incremental ADC (IADC)?
    2. 2.2 IADC Operation
      1. 2.2.1 RESET
      2. 2.2.2 SKIP
      3. 2.2.3 CONVERT
    3. 2.3 IADC Modes of Operation
    4. 2.4 Test Examples Using TAC5212EVM-K
      1. 2.4.1 One-Shot, Single Channel Conversion
      2. 2.4.2 One-Shot, Multichannel Conversion
      3. 2.4.3 One-Shot Conversion Using GPIO2
      4. 2.4.4 Sequential, Single Channel Conversion
      5. 2.4.5 Sequential, Multichannel Conversion
      6. 2.4.6 Impact of OSR on the IADC Output
  6. 3Summary
  7. 4References

2.4.5 Sequential, Multichannel Conversion

In this test, the IADC is configured to run continuous conversions until the conversion is stopped. The two ADCs of the TAC5212 convert the input DC voltage of all four input channels set as shown in Figure 2-2(a).

The results corresponding to this example are listed in Table 2-8.

####################################################################
##### IADC Configured in Sequential Multi Channel Mode 
w a0 00 00
w a0 01 01
w a0 02 09
d 10

#Configure ADC channels
w a0 50 88 #Channel 1 - DC-coupled, Single-ended MUX INP1 input
w a0 55 88 #Channel 1 - DC-coupled, Single-ended MUX INP2 input

#IADC Configurations
w a0 51 e0 #Enable IADC in sequential multi-channel mode
w a0 4c 6e #NSKIP = 1024, NRESET = 75, OSR = 128

w a0 00 01 #Page 1
w a0 55 08 #Get IADC data in diags register
w a0 00 00
w a0 76 f0
w a0 78 80 #Power up ADC
d 64

#Read IADC Locations
w a0 00 01 #Page 1
r a0 62 03 #IADC Channel 1
r a0 65 03 #IADC Channel 2
r a0 68 03 #IADC Channel 3
r a0 6b 03 #IADC Channel 4
w a0 00 00

d 64

#Read IADC Locations
w a0 00 01 #Page 1
r a0 62 03 #IADC Channel 1
r a0 65 03 #IADC Channel 2
r a0 68 03 #IADC Channel 3
r a0 6b 03 #IADC Channel 4
w a0 00 00

d 64

#Read IADC Locations
w a0 00 01 #Page 1
r a0 62 03 #IADC Channel 1
r a0 65 03 #IADC Channel 2
r a0 68 03 #IADC Channel 3
r a0 6b 03 #IADC Channel 4
w a0 00 00

w a0 78 00 #Power down ADC
w a0 51 00 #Disable IADC
Table 2-8 Readback Values of IADC in Sequential, Multichannel Conversion
Readback IterationCH1 Readback
(IN1P)		CH2 Readback
(IN2P)		CH3 Readback
(IN1M)		CH4 Readback
(IN2M)
11.612474V
1.679731V(cal)
(0x02E791)		0.969072V
0.866329V(cal)
(0xFB08FB)		1.310879V
1.300301V(cal)
(0xFF373A)		1.959433V
2.112929V(cal)
(0x0725F2)
21.612131V
1.679299V(cal)
(0x02E67E)		0.967906V
0.864862V(cal)
(0xFB0554)		1.310251V
1.299510V(cal)
(0xFF3543))		1.959676V
2.113234V(cal)
(0x0726B5)
31.612001V
1.679135V(cal)
(0x02E616)		0.968047V
0.865040V(cal)
(0xFB05C5)		1.310327V
1.299606V(cal)
(0xFF3580)		1.959466V
2.112970V(cal)
(0x07260C)