SLAA908A September   2019  – September 2021 MSP430FR2032 , MSP430FR2032 , MSP430FR2033 , MSP430FR2033 , MSP430FR2153 , MSP430FR2153 , MSP430FR2155 , MSP430FR2155 , MSP430FR2310 , MSP430FR2310 , MSP430FR2311 , MSP430FR2311 , MSP430FR2353 , MSP430FR2353 , MSP430FR2355 , MSP430FR2355 , MSP430FR2422 , MSP430FR2422 , MSP430FR2433 , MSP430FR2433 , MSP430FR2475 , MSP430FR2475 , MSP430FR2476 , MSP430FR2476 , MSP430FR4131 , MSP430FR4131 , MSP430FR4132 , MSP430FR4132

 

  1.   Trademarks
  2. 1Introduction
  3. 2Implementation
  4. 3UART Message Format
    1. 3.1 Write N Bytes to Slave Device
    2. 3.2 Read N Bytes From Slave Device
    3. 3.3 Repeated Start (Read After Write)
    4. 3.4 Repeated Start (Write After Write)
    5. 3.5 Write to Internal Register
    6. 3.6 Read From Internal Register
  5. 4Internal Registers Available
    1. 4.1 Register Summary
    2. 4.2 Baud Rate Generator (BRG)
    3. 4.3 I2C Bus Clock Rates (I2CClk)
  6. 5Performance
  7. 6Application Examples
    1. 6.1 Test With I2C Slave Device
    2. 6.2 Read and Write EEPROM
  8. 7Reference
  9. 8Revision History

4.3 I2C Bus Clock Rates (I2CClk)

This register sets the serial clock frequency (the default is 100 kHz). Table 4-3 lists the supported serial rates.

Table 4-3 I2C Bus Clock Frequency
I2CClk I2C Bus Clock Frequency (kHz)
(hex) (dec)
0x0028 40 400
0x0050 80 200
0x00A0 160 100
0x0140 320 50
0x0280 640 25

The frequency can be determined using Equation 2.

Equation 2. I 2 C   B i t   F r e q u e n c y   =   16 × 10 6 ( I 2 C C l k H , I 2 C l k L )
Note:

For the new bit frequency to take effect, both I2CClkH and I2CClkL must be written with new values simultaneously. The new baud rate takes effect immediately after I2CClkH or I2CClkL are written.