SLAA701B October 2016 – June 2026 TAS5342A , TAS5342LA , TAS5352 , TAS5630B , TPA3220 , TPA3221 , TPA3251 , TPA3255 , TPA3255-Q1
At idle, the PWM duty cycle of a class-D amplifier is 50%. Calculating the maximum ripple current of the amplifier at idle is now possible.
AD- and BD-modulation class-D amplifiers produce a common-mode voltage of PVDD / 2 after the LC filter at idle, because this is the average value of the 50% duty cycle PWM switching waveform (see Figure 1-23 and Figure 1-24).
Figure 1-23 PVDD / 2 Common-Mode VoltageTherefore, the voltage across the output inductor actually changes polarity when the PWM voltage reaches PVDD / 2. The maximum voltage across the inductor is PVDD / 2 and the minimum voltage is –PVDD / 2 (see Figure 1-25).
Figure 1-24 PWM Voltage WaveformFrom these arguments, the inductor voltage and current waveforms are drawn.
Figure 1-25 Inductor Voltage and CurrentAt idle, the positive and negative current flow through the inductor must be symmetrical and therefore centered around zero. Otherwise, there is a DC offset across the speaker and a constant average current flow through the load. The shaded regions in Figure 1-25 indicate the direction of current flow.
Using Figure 1-25 and Equation 12, the peak ripple current at idle can be calculated.

Increasing the inductance reduces the output ripple current, and better efficiency is generally observed.