SFFSA43A December   2024  – September 2025 LM5125-Q1 , LM5125A-Q1

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 VQFN Package
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 LM5125-Q1 (VQFN) Package
    2. 4.2 LM5125A-Q1 (VQFN) Package
    3. 4.3 LM51251A-Q1 (VQFN) Package
  7. 5Revision History

3 Failure Mode Distribution (FMD)

The failure mode distribution estimation for LM5125-Q1, LM5125A-Q1, and LM51251A-Q1 in Table 3-1 comes from the combination of common failure modes listed in standards such as IEC 61508 and ISO 26262, the ratio of sub-circuit function size and complexity, and from best engineering judgment.

The failure modes listed in this section reflect random failure events and do not include failures resulting from misuse or overstress.

Table 3-1 Die Failure Modes and Distribution
Die Failure Modes Failure Mode Distribution (%)
HO1 or HO2 (or both) gate drivers are stuck on 5
LO1 or LO2 (or both) gate drivers are stuck on
HO1 or HO2 (or both) gate drivers are stuck off 15
LO1 or LO2 (or both) gate drivers are stuck off
HO1 or HO2 (or both) gate drivers are Hi-Z 5
LO1 or LO2 (or both) gate drivers are Hi-Z
VCC LDO output voltage is out of specification 15
VOUT voltage is out of specification 40
PGOOD/nFAULT false or fails to trip 10
Digital control malfunctions, or
electrical parameters are out of specification		 10