SDAA295 March   2026 DS90LV012A

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2DP/eDP Link Training Procedure and Debugging Methodology
    1. 2.1 Link Training Procedure
    2. 2.2 Debug Guide for Link Training Failure
      1. 2.2.1 Debugging Points when Clock Recovery is Not Successful
      2. 2.2.2 Debugging Points when Channel Equalization is Not Successful
      3. 2.2.3 Debugging Points when Symbol Lock and Inter-Lane Alignment is Not Successful:
  6. 3DP/eDP AUX Channel Signal Overview
    1. 3.1 AUX Transaction Types
    2. 3.2 DPTX and DPRX AUX Design Guidance
      1. 3.2.1 DP/eDP Implementation
      2. 3.2.2 Electrical Specifications
      3. 3.2.3 AUX EYE Diagram
  7. 4Decoding AUX Channel Signal
    1. 4.1 AUX Transaction Syntax
    2. 4.2 How To Use DS90LV011-12AEVM to Capture DP/eDP AUX Channel Signal
    3. 4.3 AUX Channel Decoding Methodology
    4. 4.4 AUX Channel Decoding Example
  8. 5Summary
  9. 6References

5 Summary

Overall, this application note presents a practical engineering guide for DP/eDP link training technology with emphasis on systematic debugging approaches and AUX channel signal analysis techniques. Most notably, this document presents a complete implementation methodology using the DS90LV011-12AEVM differential receiver evaluation module for signal conversion, enabling engineers to diagnose and resolve link training issues efficiently through validated measurement techniques.