SBOU294 September   2022 TMP1827

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
    1. 1.1 EVM Kit Contents
  4. 2EVM Hardware
    1. 2.1 Perforations
    2. 2.2 Subregulator
    3. 2.3 Logic Level Translator
    4. 2.4 Programming Header
    5. 2.5 BSL Button
    6. 2.6 Status LED
  5. 3Software Download
    1. 3.1 Live Software on dev.ti.com
    2. 3.2 Download from dev.ti.com
  6. 4Software
    1. 4.1 Home Tab
    2. 4.2 Data Capture Tab
    3. 4.3 Registers Tab
    4. 4.4 EEPROM Tab
  7. 5Schematic, Board Layout and Bill of Materials
    1. 5.1 Schematic
    2. 5.2 Printed Circuit Board (PCB)
    3. 5.3 Bill of Materials

2.3 Logic Level Translator

The translators U3 and U6 separates the MSP430 UART host from the TMP1827 device. This is not required for end applications, but the translator is provided on the EVM as a courtesy. When the subregulator is disabled, a voltage between 1.7 V and 5.5 V can be applied at the 3P3V net, which is the 3.3-V pin on the perforation. This external voltage will illuminate the green LED D3 and power the TMP1827 device.