SBAA565 November   2022 ADC081C021 , ADC081C027 , ADC101C021 , ADC101C027 , ADC121C021 , ADC121C021-Q1 , ADC121C027 , ADC128D818 , ADS1000 , ADS1000-Q1 , ADS1013 , ADS1014 , ADS1015 , ADS1015-Q1 , ADS1100 , ADS1110 , ADS1112 , ADS1113 , ADS1114 , ADS1115 , ADS1115-Q1 , ADS7823 , ADS7827 , ADS7828 , ADS7828-Q1 , ADS7830 , ADS7924 , AFE539A4 , DAC081C081 , DAC081C085 , DAC101C081 , DAC101C081Q , DAC101C085 , DAC121C081 , DAC121C085 , DAC43204 , DAC43401 , DAC43401-Q1 , DAC43608 , DAC43701 , DAC43701-Q1 , DAC53002 , DAC53004 , DAC53202 , DAC53204 , DAC53204W , DAC53401 , DAC53401-Q1 , DAC53608 , DAC53701 , DAC53701-Q1 , DAC5571 , DAC5573 , DAC5574 , DAC5578 , DAC60501 , DAC60502 , DAC63002 , DAC63004 , DAC63202 , DAC63204 , DAC6571 , DAC6573 , DAC6574 , DAC6578 , DAC70501 , DAC70502 , DAC7571 , DAC7573 , DAC7574 , DAC7578 , DAC7678 , DAC80501 , DAC80502 , DAC8571 , DAC8574

 

  1.   Abstract
  2.   Trademarks
  3. 1I2C Overview
    1. 1.1 History
    2. 1.2 I2C Speed Modes
  4. 2I2C Physical Layer
    1. 2.1 Two-Wire Communication
    2. 2.2 Open-Drain Connection
    3. 2.3 Non-Destructive Bus Contention
  5. 3I2C Protocol
    1. 3.1 I2C START and STOP
    2. 3.2 Logical Ones and Zeros
    3. 3.3 I2C Communication Frames
  6. 4I2C Examples
    1. 4.1 DAC80501 Example
      1. 4.1.1 DAC80501 DAC Data Register
      2. 4.1.2 DAC80501 I2C Example Write
    2. 4.2 ADS1115 Example
      1. 4.2.1 ADS1115 Configuration Register
      2. 4.2.2 ADS1115 I2C Example Read
      3. 4.2.3 ADS1115 Conversion Result
  7. 5Reserved Addresses
    1. 5.1 General Call
    2. 5.2 START Byte
    3. 5.3 C-Bus Address, Different Bus Format, Future Purposes
    4. 5.4 HS-Mode Controller Code
    5. 5.5 Device ID
    6. 5.6 10-Bit Target Addressing
      1. 5.6.1 10-Bit Target Addressing Write
      2. 5.6.2 10-Bit Target Addressing Read
  8. 6Advanced Topics
    1. 6.1 Clock Synchronization and Arbitration
    2. 6.2 Clock Stretching
    3. 6.3 Electrical Specifications
    4. 6.4 Voltage Level Translation
      1. 6.4.1 Example 1
      2. 6.4.2 Example 2
      3. 6.4.3 Example 3
      4. 6.4.4 Example 4
    5. 6.5 Pullup Resistor Sizing
      1. 6.5.1 Minimum Pullup Resistance Sizing
      2. 6.5.2 Maximum Pullup Resistance Sizing
  9. 7Protocols Similar to I2C
  10. 8Summary

4.1.2 DAC80501 I2C Example Write

The I2C write begins with a START condition. SDA is pulled low, and then SCL is pulled low. Then the I2C address is written. With the A0 pin connected to VDD, the DAC80501 responds to an address of 100 1001 (or 49h). The Read/Write (R/W) bit is set low, indicating that the controller is writing to the device.

After the completion of the address byte, the DAC80501 ACKs the address by pulling down the SDA for the last bit of the address frame. The controller sends out the address and read or write information to all of the targets on the bus. If the target DAC80501 has a matching address, the device sends an ACK to indicate to the controller that a valid address is received and so that the device is ready to receive information.

After the controller sends the address with the write to the DAC80501, the controller tells the device which register is being written to. The second byte sent to the target device is the register pointer for the DAC Data register. Here, 0000 1000 is sent to the DAC80501. As a response, the DAC80501 pulls down on SDA for an ACK. Again, the target device is indicating to the controller that the device has received the address pointer data and which register is being written to.

Now, the DAC data register value is sent to the target device one byte at a time. For this byte, send in the first byte of the DAC data. Bit 0100 1100 is sent to the DAC80501. The DAC80501 ACKs the first byte.

Finally, the last byte of the configuration register is sent to the target device. Here, 1100 1101 is sent to the DAC80501. The DAC80501 ACKs this second data byte. At the end, SCL is released high and then SDA is released high. In this action, the controller releases the bus by issuing a STOP condition.

Putting the frames together, the I2C write appears as Figure 4-2. Here,the diagram shows the entire communication with the proper bit settings for all frames. If an oscilloscope plots the I2C communication for SDA and SCL, this figure can be directly compared with the plot for debugging.

Figure 4-2 Example Write to the DAC Data Register of the DAC80501