ZHCSV99C February   1997  – October 2024 XTR105

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings #GUID-80F0CD5F-C345-42B2-B6A9-580512790460/R_DESCRIPTION_LI1
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics
    5. 5.5 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Linearization
        1. 6.3.1.1 High-Resistance RTDs
      2. 6.3.2 Voltage Regulator
      3. 6.3.3 Open-Circuit Protection
      4. 6.3.4 Reverse-Voltage Protection
      5. 6.3.5 Surge Protection
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 External Transistor
      2. 7.1.2 Loop Power Supply
      3. 7.1.3 2-Wire and 3-Wire RTD Connections
      4. 7.1.4 Radio Frequency Interference
      5. 7.1.5 Error Analysis
    2. 7.2 Typical Applications
    3. 7.3 Layout
      1. 7.3.1 Layout Guidelines
  9. Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 接收文档更新通知
    3. 8.3 支持资源
    4. 8.4 Trademarks
    5. 8.5 静电放电警告
    6. 8.6 术语表
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

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Radio Frequency Interference

The long wire lengths of current loops invite radio frequency (RF) interference. RF can be rectified by the sensitive input circuitry of the XTR105, causing errors. This generally appears as an unstable output current that varies with the position of loop supply or input wiring.

If the RTD sensor is remotely located, the interference can enter at the input terminals. For integrated transmitter assemblies with short connections to the sensor, the interference more likely comes from the current loop connections.

Bypass capacitors on the input reduce or eliminate this input interference. Connect these bypass capacitors to the IRET terminal (see Figure 7-4). Although the dc voltage at the IRET terminal is not equal to 0V (at the loop supply, VPS), this circuit point can be considered the transmitter ground. The 0.01µF capacitor connected between V+ and IO can help minimize output interference.

XTR105 Input Bypassing Technique With
                    Linearization Figure 7-4 Input Bypassing Technique With Linearization