ZHCSJY8E june   2019  – february 2021 UCC256402 , UCC256403 , UCC256404

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
    1.     Device Comparison Table
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Hybrid Hysteretic Control
      2. 7.3.2 Regulated 13-V Supply
      3. 7.3.3 Feedback Chain
        1. 7.3.3.1 Optocoupler Feedback Signal Input and Bias
        2. 7.3.3.2 FB Pin Voltage Clamp
        3. 7.3.3.3 "Pick Lower Value" Block and Soft Start Multiplexer
        4. 7.3.3.4 Pick Higher Block and Burst Mode Multiplexer
        5. 7.3.3.5 VCR Comparators
      4. 7.3.4 Resonant Capacitor Voltage Sensing
      5. 7.3.5 Resonant Current Sensing
      6. 7.3.6 Bulk Voltage Sensing
      7. 7.3.7 Output Voltage Sensing
      8. 7.3.8 High Voltage Gate Driver
        1. 7.3.8.1 Adaptive Dead Time Control
      9. 7.3.9 Protections
        1. 7.3.9.1 ZCS Region Prevention
        2. 7.3.9.2 Over Current Protection (OCP)
        3. 7.3.9.3 Bias Winding Over Voltage Protection (BWOVP)
        4. 7.3.9.4 Input Under Voltage Protection (VINUVP)
        5. 7.3.9.5 Input Over Voltage Protection (VINOVP)
        6. 7.3.9.6 Boot UVLO
        7. 7.3.9.7 RVCC UVLO
        8. 7.3.9.8 Over Temperature Protection (OTP)
    4. 7.4 Device Functional Modes
      1. 7.4.1 High Voltage Start-Up
      2. 7.4.2 X-Capacitor Discharge
      3. 7.4.3 Burst Mode Control
        1. 7.4.3.1 Soft-Start and Burst-Mode Threshold
        2. 7.4.3.2 BMTL/BMTH Ratio Programming
      4. 7.4.4 System State Machine
        1.       Application and Implementation
          1. 8.1 Application Information
          2. 8.2 Typical Application
            1. 8.2.1 Design Requirements
            2. 8.2.2 Detailed Design Procedure
              1. 8.2.2.1  LLC Power Stage Requirements
              2. 8.2.2.2  LLC Gain Range
              3. 8.2.2.3  Select Ln and Qe
              4. 8.2.2.4  Determine Equivalent Load Resistance
              5. 8.2.2.5  Determine Component Parameters for LLC Resonant Circuit
              6. 8.2.2.6  LLC Primary-Side Currents
              7. 8.2.2.7  LLC Secondary-Side Currents
              8. 8.2.2.8  LLC Transformer
              9. 8.2.2.9  LLC Resonant Inductor
              10. 8.2.2.10 LLC Resonant Capacitor
              11. 8.2.2.11 LLC Primary-Side MOSFETs
              12. 8.2.2.12 LLC Rectifier Diodes
              13. 8.2.2.13 LLC Output Capacitors
              14. 8.2.2.14 HV Pin Series Resistors
              15. 8.2.2.15 BLK Pin Voltage Divider
              16. 8.2.2.16 ISNS Pin Differentiator
              17. 8.2.2.17 VCR Pin Capacitor Divider
              18. 8.2.2.18 BW Pin Voltage Divider
              19. 8.2.2.19 Soft Start and Burst Mode Programming
            3. 8.2.3 Application Curves
  8. Power Supply Recommendations
    1. 8.1 VCC Pin Capacitor
    2. 8.2 Boot Capacitor
    3. 8.3 RVCC Pin Capacitor
  9. Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Related Links
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Community Resources
    5. 10.5 Trademarks
      1.      Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

VCR Pin Capacitor Divider

The capacitor divider on the VCR pin sets two parameters: (1) the divider ratio of the resonant capacitor voltage; (2) the amount of frequency compensation to be added. The first criteria the capacitor divider needs to meet is that under over load condition, the peak-to-peak voltage on the VCR pin is with in 6 V. It is recommended to size the VCR capacitance to give a total peak to peak voltage between 3 V and 4.5 V at full load with the frequency compensation ramp contributing between 1 V and 2 V to the total VCR peak to peak voltage. For this design, the VCR pin capacitance was selected to give a maximum peak to peak voltage of approximately 4.25 V at full load with the internal ramp contributing 1.75 V to the total VCR waveform.

The required VCR capacitance can be calculated directly from the resonant capacitor peak to peak voltage and the minimum expected switching frequency.

Equation 57. GUID-51E2DB31-F51F-4D83-8156-C0C83A8BD1F2-low.gif

Based on the expected peak to peak resonant capacitor voltage, the required capacitor divider ratio can be derived

Equation 58. GUID-5F78DD04-AE06-4285-A608-D532E1B6F738-low.gif

From the expected minimum switching frequency, the lower VCR capacitance can be derived

Equation 59. GUID-A4DC03A0-6911-401B-A86A-E57B909C2EA0-low.gif

A standard value of 8.2 nF is chosen for the lower VCR capacitor. From the selected lower VCR capacitor and calculated capacitor divider ratio, the upper VCR capacitance is given by:

Equation 60. GUID-4C4ABA8B-CDEA-4C55-B427-FA836E5BD595-low.gif

A standard value of 68 pF is selected for the upper VCR capacitor. From the selected upper and lower VCR capacitors, the actual peak to peak voltage on the VCR pin can be calculated

Equation 61. GUID-CDEAA3A0-1559-4152-BE1B-554400C8405D-low.gif
Equation 62. GUID-3EB93D70-A83E-445B-8B62-D5A36364680C-low.gif