ZHCSQK6 May   2022 TPS92643-Q1

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Internal Regulator
      2. 7.3.2  Buck Converter Switching Operation
      3. 7.3.3  Bootstrap Supply
      4. 7.3.4  Switching Frequency and Adaptive On-Time Control
      5. 7.3.5  Minimum On-Time, Off-Time, and Inductor Ripple
      6. 7.3.6  LED Current Regulation and Error Amplifier
      7. 7.3.7  Start-Up Sequence
      8. 7.3.8  Analog Dimming and Forced Continuous Conduction Mode
      9. 7.3.9  External PWM Dimming and Input Undervoltage Lockout (UVLO)
      10. 7.3.10 Analog Pulse Width Modulator Circuit
      11. 7.3.11 Output Short and Open-Circuit Faults
      12. 7.3.12 Overcurrent Protection
      13. 7.3.13 Thermal Shutdown
      14. 7.3.14 Fault Indicator and Diagnostics Summary
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1  Duty Cycle Considerations
      2. 8.1.2  Switching Frequency Selection
      3. 8.1.3  LED Current Programming
      4. 8.1.4  Inductor Selection
      5. 8.1.5  Output Capacitor Selection
      6. 8.1.6  Input Capacitor Selection
      7. 8.1.7  Bootstrap Capacitor Selection
      8. 8.1.8  Bootstrap Resistor Selection
      9. 8.1.9  Compensation Capacitor Selection
      10. 8.1.10 Input Dropout and Undervoltage Protection
      11. 8.1.11 APWM Input and Thermal Protection
      12. 8.1.12 Protection Diodes
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Calculating Duty Cycle
        2. 8.2.2.2  Calculating Minimum On-Time and Off-Time
        3. 8.2.2.3  Minimum Switching Frequency
        4. 8.2.2.4  LED Current Set Point
        5. 8.2.2.5  Inductor Selection
        6. 8.2.2.6  Output Capacitor Selection
        7. 8.2.2.7  Bootstrap Capacitor Selection
        8. 8.2.2.8  Bootstrap Resistor Selection
        9. 8.2.2.9  Compensation Capacitor Selection
        10. 8.2.2.10 VIN Dropout Protection and PWM Dimming
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Compact Layout for EMI Reduction
        1. 10.1.1.1 Ground Plane
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 接收文档更新通知
    2. 11.2 支持资源
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 术语表
  12. 12Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Layout Guidelines

The performance of any switching converter depends as much on the layout of the PCB as the component selection. The following guidelines can help design a PCB with the best power converter performance.

  • Place ceramic high-frequency bypass capacitors as close as possible to the TPS92643-Q1 VIN and PGND pins. Grounding for both the input and output capacitors must consist of localized top side planes that connect to the PGND pin.
  • Place bypass capacitors for VCC close to the pins and ground the capacitors to device ground.
  • Use wide traces for the CBST capacitor and RBST resistor. Place RBST and CBST network as close as possible to BST pin and SW pin.
  • Differentially route the CSP and CSN pins to sense resistor. Route the traces away from noisy nodes, preferably through a layer on the other side of a shielding/ground layer.
  • Use ground plane in one of the middle layers for noise shielding.
  • Make VIN and ground connection as wide as possible. This action reduces any voltage drops on the input of the converter and maximizes efficiency.
  • Keep switch area small. Keep the copper area connecting the SW pin to the inductor as short and wide as possible. At the same time, the total area of this node must be minimized to help reduce radiated EMI.