ZHCSQC5B December   2022  – February 2024 TPS7A21-Q1

PRODMIX  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Smart Enable (EN)
      2. 6.3.2 Low Output Noise
      3. 6.3.3 Active Discharge
      4. 6.3.4 Dropout Voltage
      5. 6.3.5 Foldback Current Limit
      6. 6.3.6 Undervoltage Lockout
      7. 6.3.7 Thermal Overload Protection (TSD)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Device Functional Mode Comparison
      2. 6.4.2 Normal Operation
      3. 6.4.3 Dropout Operation
      4. 6.4.4 Disabled
  8. 7 Applications and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Recommended Capacitor Types
      2. 7.1.2 Input and Output Capacitor Requirements
      3. 7.1.3 Load Transient Response
      4. 7.1.4 Undervoltage Lockout (UVLO) Operation
      5. 7.1.5 Power Dissipation (PD)
      6. 7.1.6 Estimating Junction Temperature
      7. 7.1.7 Recommended Area For Continuous Operation
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Power Dissipation and Device Operation
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 接收文档更新通知
    4. 8.4 支持资源
    5. 8.5 Trademarks
    6. 8.6 静电放电警告
    7. 8.7 术语表
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

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7.2.2.1 Power Dissipation and Device Operation

The permissible power dissipation for any package is a measure of the capability of the device to pass heat from the power source (the junctions of the device) to the ultimate heat sink of the ambient environment. Thus, power dissipation is dependent on the ambient temperature and the thermal resistance across the various interfaces between the die junction and ambient air.

Equation 6 calculates the maximum allowable power dissipation for the device in a given package:

Equation 6. PD-MAX = ((TJ-MAX – TA) / RθJA)

Equation 7 represents the actual power being dissipated in the device:

Equation 7. PD = (VIN – VOUT) × IOUT

These two equations establish the relationship between the maximum power dissipation allowed resulting from thermal consideration, the voltage drop across the device, and the continuous current capability of the device. Use these two equations to determine the optimum operating conditions for the device in the application.

In applications where lower power dissipation (PD) or excellent package thermal resistance (RθJA) is present, increase the maximum ambient temperature (TA-MAX).

In applications where high power dissipation or poor package thermal resistance is present, derate the maximum ambient temperature (TA-MAX) if necessary. As given by Equation 8, TA-MAX is dependent on the maximum operating junction temperature (TJ-MAX-OP = 150°C), the maximum allowable power dissipation in the device package in the application (PD-MAX), and the junction-to ambient thermal resistance of the device or package in the application (RθJA):

Equation 8. TA-MAX = (TJ-MAX-OP – (RθJA × PD-MAX))

Alternately, if TA-MAX is unable to be derated, do not reduce the PD value. This reduction is accomplished by reducing VIN in the VIN–VOUT term as long as the minimum VIN is met, or by reducing the IOUT term, or by some combination of the two.