ZHCSQV6
june 2023
TPS6521905
PRODUCTION DATA
1
1
特性
2
应用
3
说明
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
System Control Thresholds
6.6
BUCK1 Converter
6.7
BUCK2, BUCK3 Converter
6.8
General Purpose LDOs (LDO1, LDO2)
6.9
General Purpose LDOs (LDO3, LDO4)
6.10
GPIOs and multi-function pins (EN/PB/VSENSE, nRSTOUT, nINT, GPO1, GPO2, GPIO, MODE/RESET, MODE/STBY, VSEL_SD/VSEL_DDR)
6.11
Voltage and Temperature Monitors
6.12
I2C Interface
6.13
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Power-Up Sequencing
7.3.2
Power-Down Sequencing
7.3.3
Push Button and Enable Input (EN/PB/VSENSE)
7.3.4
Reset to SoC (nRSTOUT)
7.3.5
Buck Converters (Buck1, Buck2, and Buck3)
7.3.6
Linear Regulators (LDO1 through LDO4)
7.3.7
Interrupt Pin (nINT)
7.3.8
PWM/PFM and Low Power Modes (MODE/STBY)
7.3.9
PWM/PFM and Reset (MODE/RESET)
7.3.10
Voltage Select pin (VSEL_SD/VSEL_DDR)
7.3.11
General Purpose Inputs or Outputs (GPO1, GPO2, and GPIO)
7.3.12
I2C-Compatible Interface
7.3.12.1
Data Validity
7.3.12.2
Start and Stop Conditions
7.3.12.3
Transferring Data
7.4
Device Functional Modes
7.4.1
Modes of Operation
7.4.1.1
OFF State
7.4.1.2
INITIALIZE State
7.4.1.3
ACTIVE State
7.4.1.4
STBY State
7.4.1.5
Fault Handling
7.5
User Registers
7.6
Device Registers
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Typical Application Example
8.2.2
Design Requirements
8.2.3
Detailed Design Procedure
8.2.3.1
Buck1, Buck2, Buck3 Design Procedure
8.2.3.2
LDO1, LDO2 Design Procedure
8.2.3.3
LDO3, LDO4 Design Procedure
8.2.3.4
VSYS, VDD1P8
8.2.3.5
Digital Signals Design Procedure
8.3
Multi-PMIC Operation
8.4
NVM Programming
8.4.1
TPS6521905 default NVM settings
8.4.2
NVM programming in Initialize State
8.4.3
NVM Programming in Active State
8.5
Application Curves
8.6
Power Supply Recommendations
8.7
Layout
8.7.1
Layout Guidelines
8.7.2
Layout Example
9
Device and Documentation Support
9.1
Documentation Support
9.1.1
Related Documentation
9.2
接收文档更新通知
9.3
支持资源
9.4
Trademarks
9.5
静电放电警告
9.6
术语表
10
Mechanical, Packaging, and Orderable Information
封装选项
机械数据 (封装 | 引脚)
RSM|32
MPQF195B
RHB|32
MPQF130D
散热焊盘机械数据 (封装 | 引脚)
RSM|32
QFND112H
RHB|32
QFND676
订购信息
zhcsqv6_oa
1
特性
3
个高达 2.3MHz 非固定开关频率的降压转换器:
1 个 VIN:2.5V – 5.5V;I
OUT
:3.5A;V
OUT
0.6V – 3.4V
2 个 VIN:2.5V – 5.5V;I
OUT
:2A;V
OUT
0.6V – 3.4V
4
个线性稳压器:
2 个 VIN:1.5V – 5.5V;I
OUT
:
400
mA;V
OUT
:0.6V – 3.4V(可配置为负载开关和旁路模式,支持 SD 卡)
2
x VIN:2.2V – 5.5V;I
OUT
:300mA;V
OUT
:1.2V – 3.3V(可配置为负载开关)
所有
三
个降压转换器上的动态电压调节
低 IQ/PFM 的 PWM 模式(准固定频率)
可编程电源时序和默认电压
I
2
C 接口,支持标准模式、快速模式和快速模式增强版
设计为支持具有多达
14
个以上电源轨的系统(2 个
TPS6521905
,每个
7
个电源轨 + GPO 控制的外部电源轨)
2 个 GPO、1 个 GPIO 和 3 个多功能引脚
EEPROM
可编程性