ZHCSKY4B November   2018  – December 2020 TPS55288

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Timing Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  VCC Power Supply
      2. 7.3.2  Operation Mode Setting
      3. 7.3.3  Input Undervoltage Lockout
      4. 7.3.4  Enable and Programmable UVLO
      5. 7.3.5  Soft Start
      6. 7.3.6  Shutdown and Load Discharge
      7. 7.3.7  Switching Frequency
      8. 7.3.8  Switching Frequency Dithering
      9. 7.3.9  Inductor Current Limit
      10. 7.3.10 Internal Charge Path
      11. 7.3.11 Output Voltage Setting
      12. 7.3.12 Output Current Monitoring and Cable Voltage Droop Compensation
      13. 7.3.13 Integrated Gate Drivers
      14. 7.3.14 Output Current Limit
      15. 7.3.15 Overvoltage Protection
      16. 7.3.16 Output Short Circuit Protection
      17. 7.3.17 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 PWM Mode
      2. 7.4.2 Power Save Mode
    5. 7.5 I2C Serial Interface
      1. 7.5.1 Data Validity
      2. 7.5.2 START and STOP Conditions
      3. 7.5.3 Byte Format
      4. 7.5.4 Acknowledge (ACK) and Not Acknowledge (NACK)
      5. 7.5.5 Slave Address and Data Direction Bit
      6. 7.5.6 Single Read and Write
      7. 7.5.7 Multi-Read and Multi-Write
    6. 7.6 Register Maps
      1. 7.6.1 REF Register (Address = 0h, 1h) [reset = 11010010h, 00000000h]
      2. 7.6.2 IOUT_LIMIT Register (Address = 2h) [reset = 11100100h]
      3. 7.6.3 VOUT_SR Register (Address = 3h) [reset = 00000001h]
      4. 7.6.4 VOUT_FS Register (Address = 4h) [reset = 00000011h]
      5. 7.6.5 CDC Register (Address = 5h) [reset = 11100000h]
      6. 7.6.6 MODE Register (Address = 6h) [reset = 00100000h]
      7. 7.6.7 STATUS Register (Address = 7h) [reset = 00000011h]
      8. 7.6.8 Register Summary
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 USB PD Power Supply Detailed Design Procedure
        1. 8.2.2.1 Switching Frequency
        2. 8.2.2.2 Output Voltage Setting
        3. 8.2.2.3 Inductor Selection
        4. 8.2.2.4 Input Capacitor
        5. 8.2.2.5 Output Capacitor
        6. 8.2.2.6 Output Current Limit
        7. 8.2.2.7 Loop Stability
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 第三方产品免责声明
    2. 11.2 接收文档更新通知
    3. 11.3 支持资源
    4. 11.4 Trademarks
    5. 11.5 静电放电警告
    6. 11.6 术语表
  12. 12Mechanical, Packaging, and Orderable Information

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7.3.12 Output Current Monitoring and Cable Voltage Droop Compensation

The TPS55288 outputs a voltage at the CDC pin proportional to the sensed voltage across a output current sensing resistor between the ISP pin and the ISN pin. Equation 7 shows the exact voltage at the CDC pin related to the sensed output current.

Equation 7. GUID-32BBA7B7-D80B-4979-9A0F-A1A69F719252-low.gif

To compensate the voltage droop across a cable from the output of the USB port to its powered device, the TPS55288 can lift its output voltage in proportion to the load current. There are two methods in the TPS55288 to implement the compensation: by setting internal register 05h or by placing a resistor between the CDC pin and AGND pin.

When using internal output voltage feedback, it is recommended to use the internal compensation setting. When using an external resistor divider at the FB/INT pin to set the output voltage, it is recommended to use the external compensation setting by placing a resistor at the CDC pin.

By default, the internal cable voltage droop compensation function is enabled with 0 V added to the output voltage. Write the value into the bit CDC [2:0] in register 05h to get the desired voltage compensation.

When using external output voltage feedback, external compensation is better than the internal register for its high accuracy. The output voltage rises in proportion to the current sourcing from the CDC pin through the resistor at the CDC pin. It is recommended to use 100-kΩ resistance for the up resistor of the feedback resistor divider. Equation 8 shows the output voltage rise related to the sensed output current, the resistance at the CDC pin, and the up resistor of the output voltage feedback resistor divider.

Equation 8. GUID-6053EFFF-79DF-4D7D-90BB-16F9A6774FE4-low.gif

where

  • RFB_UP is the up resistor of the resistor divider between the output and the FB/INT pin
  • RCDC is the resistor at the CDC pin

When RFB_UP is 100 kΩ, the output voltage rise versus the sensed output current and the resistor at the CDC pin is shown in Figure 7-6.

GUID-20E03246-4E35-4ABA-998C-47A5CD4D7EA5-low.gifFigure 7-6 Output Voltage Rise vs Output Current