SLVSHR0 May   2025 TPS2HCS08-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1. 5.1 A Version Package
    2. 5.2 Pinout - Version A
    3. 5.3 Version B Package
    4. 5.4 Pinout - Version B
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 SPI Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Device Functional Modes
      1. 8.3.1 State Diagram
      2. 8.3.2 Output Control
      3. 8.3.3 SPI Mode Operation
      4. 8.3.4 Fault Reporting
      5. 8.3.5 SLEEP
      6. 8.3.6 CONFIG/ACTIVE
      7. 8.3.7 LIMP_HOME State (Version A only)
      8. 8.3.8 Battery Supply Input (VBB) Under-voltage
      9. 8.3.9 LOW POWER MODE (LPM) States
        1. 8.3.9.1 MANUAL_LPM State
        2. 8.3.9.2 AUTO_LPM State
    4. 8.4 Feature Description
      1. 8.4.1 Protection Mechanisms
        1. 8.4.1.1 Overcurrent Protection
          1. 8.4.1.1.1 Inrush Period - Overcurrent Protection
          2. 8.4.1.1.2 Overcurrent Protection - Steady State Operation
          3. 8.4.1.1.3 Programmable Fuse Protection
          4. 8.4.1.1.4 Immediate Shutdown Overcurrent Protection (IOCP)
          5. 8.4.1.1.5 Auto Retry and Latch-off Behavior
        2. 8.4.1.2 Thermal Shutdown
        3. 8.4.1.3 Reverse Battery
      2. 8.4.2 Diagnostic Mechanisms
        1. 8.4.2.1 Integrated ADC
        2. 8.4.2.2 Digital Current Sense Output
        3. 8.4.2.3 Output Voltage Measurement
        4. 8.4.2.4 MOSFET Temperature Measurement
        5. 8.4.2.5 Drain-to-Source Voltage (VDS) Measurement
        6. 8.4.2.6 VBB Voltage Measurement
        7. 8.4.2.7 VOUT Short-to-Battery and Open-Load
          1. 8.4.2.7.1 Measurement With Channel Output (FET) Enabled
          2. 8.4.2.7.2 Detection With Channel Output Disabled
    5. 8.5 Parallel Mode Operation
    6. 8.6 TPS2HCS08 Registers
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Thermal Considerations
        2. 9.2.2.2 Configuring the Capacitive Charging Mode
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

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AUTO_LPM State

The AUTO_LPM state provides a mode where the device can automatically transition to a low IQ state while keeping the channels on, if desired, and protected through short-circuit protection. Depending on the device version used, to enter the AUTO_LPM state the AUTO_LPM_ENTRY bit in the DEV_CONFIG register needs to be set to 1 and the following conditions need to be met for at least tSTBY_LPM_AUTO:

  • Version A
    • In active or config state with no channel state changes through CHx_ON bits
    • Enabled channels are not in the inrush period
    • All ADC diagnostics (VSNS, VBBSNS, TSNS, and VDS_SNS) are disabled except ISNS
    • IOUT < IENTRY_LPM_AUTO for enabled channels
    • AUTO_LPM_EXIT_CHx bits must both be set to 0
    • THERMAL_WRN_CHx = 0
    • Watchdog timer is disabled (WD_EN = 0)
    • No faults exist on the device
  • Version B
    • In active or config state with no channel state changes through DIx pins
    • Enabled channels are not in the inrush period
    • All ADC diagnostics (VSNS, VBBSNS, TSNS, and VDS_SNS) are disabled except ISNS
    • IOUT < IENTRY_LPM_AUTO for enabled channels
    • AUTO_LPM_EXIT_CHx bits must both be set to 0
    • THERMAL_WRN_CHx = 0
    • Watchdog timer is disabled (WD_EN = 0)
    • No faults exist on the device

Once the conditions are met the device will update the LPM_STATUS bit in the SDO frame/GLOBAL_FAULT_TYPE register and the LPM_STATUS_1 bit in the GLOBAL_FAULT_TYPE register before entering the AUTO_LPM state to alert the system that device has transitioned to AUTO_LPM. The device will enter AUTO_LPM state in tLPM_ENTRY.

In the AUTO_LPM state, the larger internal FET is used to allow for larger load steps. The RON for the larger internal FET is defined by the RON,LPM_AUTO in the electrical characteristics section. The IQ in AUTO_LPM will be higher compared to the MANUAL_LPM state. In AUTO_LPM, the entry threshold is specified by IENTRY_LPM_AUTO and the exit threshold is specified by IEXIT_LPM_AUTO.

System Wakeup from AUTO_LPM

For TPS2HCS08A-Q1, the MCU or controller can write a 1 to the either or both AUTO_LPM_EXIT_CHx bits to manually transition the device out of the AUTO_LPM state to the ACTIVE state. If either AUTO_LPM_EXIT_CHx are 1 then the corresponding channel will be enabled if not already enabled when the device is in ACTIVE state. For TPS2HCS08A-Q1, both AUTO_LPM_EXIT_CHx bits have to be set back to 0 before the device is allowed to transition back to the AUTO_LPM state.

For TPS2HCS08B-Q1, the AUTO_LPM_EXIT_CHx bits have no effect on the TPS2HCS08B-Q1. The system can manually transition the TPS2HCS08B-Q1 device out of AUTO_LPM by changing the state of DI1 or DI2 or both in AUTO_LPM state.

Automatic Exit from AUTO_LPM

When in AUTO_LPM state, the device will wake itself up and will change the LPM_STATUS bit to 0 when there is a load current increase beyond the IEXIT_LPM_AUTO threshold. The LPM_STATUS_1 bit in the GLOBAL_FAULT_TYPE register is set to 1 when in AUTO_LPM state and is read clear which enables the system to tell if the device had transitioned to the AUTO_LPM state since the GLOBAL_FAULT_TYPE register was last read. An ECU load current demand increase above the IEXIT_LPM_AUTO threshold will activate the transition to the ACTIVE state. Note, in this load increase scenario the device will not pull the FLT / WAKE_SIG low.

If there is a larger ECU load current demand increase or output short circuit above the ISCP_LPM_AUTO, the device will turn off the internal FET for that channel and will retry in tRETRY with IOCP set as the overcurrent protection threshold. In this scenario, the device will pull the FLT / WAKE_SIG pin low when there is a load current increase beyond the ISCP_LPM_AUTO threshold. The device registers a fault as over-current protection fault only if the overcurrent is also confirmed in the ACTIVE state.

Depending on the load step magnitude, the device will transition to the ACTIVE state in different ways. Figure 8-17, Figure 8-18, and Figure 8-19 showcase how the device responds to different load step magnitudes.

TPS2HCS08-Q1 Load Increase Above
                        IEXIT_LPM_AUTO and Below ISCP_LPM_AUTO in AUTO_LPM
                    State Figure 8-17 Load Increase Above IEXIT_LPM_AUTO and Below ISCP_LPM_AUTO in AUTO_LPM State
TPS2HCS08-Q1 Load Increase Above
                        ISCP_LPM_AUTO and Below IOCP in AUTO_LPM State Figure 8-18 Load Increase Above ISCP_LPM_AUTO and Below IOCP in AUTO_LPM State
TPS2HCS08-Q1 Load Increase Above
                        IOCP in AUTO_LPM State Figure 8-19 Load Increase Above IOCP in AUTO_LPM State