ZHCSDJ5B January   2015  – December 2017 TPA3140D2

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
    1.     Device Images
      1.      简化原理图
  4. 修订历史记录
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Gain Setting via GAIN Pin
      2. 9.3.2  SD Operation
      3. 9.3.3  Gain Limit Control, LIMTHRES and LIMRATE
      4. 9.3.4  SPEAKERGUARD Automatic Gain Limit, AGL
      5. 9.3.5  Thermal Foldback, TFB
      6. 9.3.6  PLIMIT
      7. 9.3.7  LIMTHRES
      8. 9.3.8  Spread Spectrum and De-Phase Control
      9. 9.3.9  GVDD Supply
      10. 9.3.10 DC Detect
      11. 9.3.11 PBTL Select
      12. 9.3.12 Short-Circuit Protection and Automatic Recovery Feature
      13. 9.3.13 Thermal Protection
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Design Requirements
        1. 10.2.1.1 PCB Material Recommendation
        2. 10.2.1.2 PVCC Capacitor Recommendation
        3. 10.2.1.3 Decoupling Capacitor Recommendations
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Ferrite Bead Filter Considerations
        2. 10.2.2.2 Efficiency: LC Filter Required with the Traditional Class-D Modulation Scheme
        3. 10.2.2.3 When to Use an Output Filter for EMI Suppression
        4. 10.2.2.4 Input Resistance
        5. 10.2.2.5 Input Capacitor, Ci
        6. 10.2.2.6 BSN and BSP Capacitors
        7. 10.2.2.7 Differential Inputs
        8. 10.2.2.8 Using Low-ESR Capacitors
      3. 10.2.3 Application Performance Curves
        1. 10.2.3.1 EN55013 Radiated Emissions Results
        2. 10.2.3.2 EN55022 Conducted Emissions Results
  11. 11Power Supply Recommendations
    1. 11.1 Power Supply Decoupling, CS
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13器件和文档支持
    1. 13.1 器件支持
      1. 13.1.1 第三方产品免责声明
    2. 13.2 文档支持
      1. 13.2.1 相关文档
    3. 13.3 社区资源
    4. 13.4 商标
    5. 13.5 静电放电警告
    6. 13.6 Glossary
  14. 14机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

LIMTHRES

The AGL and PLIMIT voltage threshold is set by the applied LIMTHRES voltage. The LIMTHRES voltage is set by a voltage divider from GVDD to GND. The limiting is done by limiting the amplifier output voltage to a fixed maximum value. This limit can be thought of as a "virtual" voltage rail, which is lower than the PVCC supply. This virtual rail is 4 times the voltage at the LIMTHRES pin. This output voltage can be used to calculate the maximum output voltage (unclipped using AGL and clipped using PLIMIT) and power for a given LIMTHRES voltage and speaker impedance.

Equation 1. TPA3140D2 PLIMITeq.gif

Where:

RS is the total series resistance including RDS(on), and any resistance in the output filter.

RL is the load resistance.

VP is the peak amplitude of the output possible within the supply rail.

VP = 4 × LIMTHRES voltage if VP< PVCC

POUT = Maximum unclipped output power. 10%THD using PLIMIT: 1.25 × PMAX (unclipped)

Increasing the LIMTHRES voltage from a given value increases the maximum output voltage swing until it equals PVCC. Adjusting LIMTHRES to a higher value will disable both the AGL and PLIMIT function and will offer highest available output power, however it is always advised to use the LIMTHRES function if PVCC is higher than the nominal value to prevent shutdown due to over current protection or to reduce frequency of thermal foldback events. To disable the AGL or PLIMIT function, the LIMTHRES pin is simply connected to GVDD.

TPA3140D2 LIMTHRES.gifFigure 20. LIMHTRES Pin Voltage Programming by GVDD Resistor Divider

Table 3. LIMTHRES Typical Operation

TEST CONDITIONS () LIMTHRES VOLTAGE (V) R to GND R to GVDD OUTPUT POWER (W), UNCLIPPED, AGL OUTPUT POWER (W), 10% THD, PLIMIT
PVCC = 12 V, RL = 6 Ω 1.9 33 kΩ 82 kΩ 4.75 6
PVCC = 12 V, RL = 6 Ω 2.2 39 kΩ 82 kΩ 6.5 8
PVCC = 12 V, RL = 6 Ω 2.5 39 kΩ 68 kΩ 8 10
PVCC = 14.4 V, RL = 8 Ω 2.2 39 kΩ 82 kΩ 4.75 6
PVCC = 14.4 V, RL = 8 Ω 2.5 39 kΩ 68 kΩ 6.5 8
PVCC = 14.4 V, RL = 8 Ω 2.8 47 kΩ 68 kΩ 8 10

space

TPA3140D2 C001_SLOS882.pngFigure 21. Max Output Power vs LIMTHRES, 8 Ω, PVCC = 13 V
TPA3140D2 C002_SLOS882.pngFigure 22. Max Output Power vs LIMTHRES, 6 Ω, PVCC = 12 V