ZHCSJ09B November   2018  – August 2024 TLV1704-SEP

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Comparator Inputs
      2.      19
    4. 6.4 Device Functional Modes
      1. 6.4.1 Setting Reference Voltage
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 接收文档更新通知
    3. 8.3 支持资源
    4. 8.4 Trademarks
    5. 8.5 静电放电警告
    6. 8.6 术语表
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

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4 Pin Configuration and Functions

TLV1704-SEP TLV1704-SEP PW Package14-Pin TSSOPTop View Figure 4-1 TLV1704-SEP PW Package
14-Pin TSSOP
Top View
Table 4-1 Pin Functions
PIN I/O DESCRIPTION
NAME NO.
IN+ — I Noninverting input.
1IN+ 5 I Noninverting input, channel 1.
2IN+ 7 I Noninverting input, channel 2.
3IN+ 9 I Noninverting input, channel 3.
4IN+ 11 I Noninverting input, channel 4.
IN– — I Inverting input.
1IN– 4 I Inverting input, channel 1.
2IN– 6 I Inverting input, channel 2.
3IN– 8 I Inverting input, channel 3.
4IN– 10 I Inverting input, channel 4.
OUT — O Output.
1OUT 2 O Output, channel 1.
2OUT 1 O Output, channel 2.
3OUT 14 O Output, channel 3.
4OUT 13 O Output, channel 4.
V+ 3 — Positive (highest) power supply.
V– 12 — Negative (lowest) power supply.