ZHCSFB6D April   2016  – June 2021 THS4551

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 描述
  4. 4 Revision History
  5. 5 Companion Devices
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: (VS+) – (VS–) = 5 V
    6. 7.6 Electrical Characteristics: (VS+) – (VS–) = 3 V
    7. 7.7 Typical Characteristics: (VS+) – (VS–) = 5 V
    8. 7.8 Typical Characteristics: (VS+) – (VS–) = 3 V
    9. 7.9 Typical Characteristics: 3-V to 5-V Supply Range
  8. 8 Parameter Measurement Information
    1. 8.1 Example Characterization Circuits
    2. 8.2 Output Interface Circuit for DC-Coupled Differential Testing
    3. 8.3 Output Common-Mode Measurements
    4. 8.4 Differential Amplifier Noise Measurements
    5. 8.5 Balanced Split-Supply Versus Single-Supply Characterization
    6. 8.6 Simulated Characterization Curves
    7. 8.7 Terminology and Application Assumptions
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Differential Open-Loop Gain and Output Impedance
      2. 9.3.2 Setting Resistor Values Versus Gain
      3. 9.3.3 I/O Headroom Considerations
      4. 9.3.4 Output DC Error and Drift Calculations and the Effect of Resistor Imbalances
    4. 9.4 Device Functional Modes
      1. 9.4.1 Operation from Single-Ended Sources to Differential Outputs
        1. 9.4.1.1 AC-Coupled Signal Path Considerations for Single-Ended Input to Differential Output Conversions
        2. 9.4.1.2 DC-Coupled Input Signal Path Considerations for Single-Ended to Differential Conversions
      2. 9.4.2 Operation from a Differential Input to a Differential Output
        1. 9.4.2.1 AC-Coupled, Differential-Input to Differential-Output Design Issues
        2. 9.4.2.2 DC-Coupled, Differential-Input to Differential-Output Design Issues
      3. 9.4.3 Input Overdrive Performance
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Noise Analysis
      2. 10.1.2 Factors Influencing Harmonic Distortion
      3. 10.1.3 Driving Capacitive Loads
      4. 10.1.4 Interfacing to High-Performance Precision ADCs
      5. 10.1.5 Operating the Power Shutdown Feature
      6. 10.1.6 Designing Attenuators
      7. 10.1.7 The Effect of Adding a Feedback Capacitor
    2. 10.2 Typical Applications
      1. 10.2.1 An MFB Filter Driving an ADC Application
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
        3. 10.2.1.3 Application Curves
      2. 10.2.2 Differential Transimpedance Output to a High-Grade Audio PCM DAC Application
        1. 10.2.2.1 Design Requirements
        2. 10.2.2.2 Detailed Design Procedure
        3. 10.2.2.3 Application Curves
      3. 10.2.3 ADC3k Driver with a 2nd-Order RLC Interstage Filter Application
        1. 10.2.3.1 Design Requirements
        2. 10.2.3.2 Detailed Design Procedure
        3. 10.2.3.3 Application Curve
  11. 11Power Supply Recommendations
    1. 11.1 Thermal Analysis
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 Board Layout Recommendations
    2. 12.2 Layout Example
    3. 12.3 EVM Board
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 TINA-TI Simulation Model Features
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 接收文档更新通知
    4. 13.4 支持资源
    5. 13.5 Trademarks
    6. 13.6 静电放电警告
    7. 13.7 术语表
  14. 14Mechanical, Packaging, and Orderable Information

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10.1.1 Noise Analysis

The first step in the output noise analysis is to reduce the application circuit to the simplest form with equal feedback and gain setting elements to ground. Figure 10-1 shows the simplest analysis circuit with the FDA and resistor noise terms to be considered.

GUID-A8E963DE-7D14-41E5-9EC6-1EEA53C18949-low.gifFigure 10-1 FDA Noise Analysis Circuit

The noise powers are shown in Figure 10-1 for each term. When the RF and RG (or RI) terms are matched on each side, the total differential output noise is the root sum squared (RSS) of these separate terms. Using NG ≡ 1 + RF / RG, the total output noise is given by Equation 10. Each resistor noise term is a 4kT × R power (4kT = 1.6E-20J at 290K).

Equation 10. GUID-BC1568DA-EAB7-4120-8A7B-2D43656DA295-low.gif

The first term is simply the differential input spot noise times the noise gain, the second term is the input current noise terms times the feedback resistor (and because there are two uncorrelated current noise terms, the power is two times one of them), and the last term is the output noise resulting from both the RF and RG resistors, at again twice the value for the output noise power of each side added together. Running a wide sweep of gains when holding RF close to 1 kΩ and setting the input up for a 50-Ω match gives the standard values and resulting noise listed in Table 10-1.

Note that when the gain increases, the input-referred noise approaches only the gain of the FDA input voltage noise term at 3.3 nV/√ Hz.

Table 10-1 Swept Gain of the Output- and Input-Referred Spot Noise Calculations
GAIN (V/V)RFRG1RTRG2ZINAVEO (nV/√ Hz)EI (nV/√ Hz)
0.110001000049.91000049.660.09965770
1100097651.1100049.21.009610.410.4
2102049952.352348.91.98813.96.95
510001875921550.25.057234.6
10102088.769.811850.610.0936.43.64