ZHCSLQ0B August   2020  – November 2023 TCA4307

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Switching Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Hot bus insertion
      2. 7.3.2 Pre-charge voltage
      3. 7.3.3 Rise time accelerators
      4. 7.3.4 Bus ready output indicator
      5. 7.3.5 Powered-off high impedance for I2C and I/O pins
      6. 7.3.6 Supports clock stretching and arbitration
      7. 7.3.7 Stuck bus recovery
    4. 7.4 Device Functional Modes
      1. 7.4.1 Start-up and precharge
      2. 7.4.2 Bus idle
      3. 7.4.3 Bus active
      4. 7.4.4 Bus stuck
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Series connections
        2. 8.2.1.2 Multiple connections to a common node
        3. 8.2.1.3 Propagation delays
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
      4. 8.2.4 Typical Application on a Backplane
        1. 8.2.4.1 Design Requirements
        2. 8.2.4.2 Detailed Design Procedure
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Power Supply Best Practices
      2. 8.3.2 Power-on Reset Requirements
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 支持资源
    3. 9.3 Trademarks
    4. 9.4 静电放电警告
    5. 9.5 术语表
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

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5.5 Electrical Characteristics

Over operating free-air temperature range (unless otherwise noted). Typical specifications are at TA = 25 °C, VCC = 3.3 V, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER SUPPLY
ICC Supply current VCC = 5.5V
SDAIN, SCLIN = 0V
SDAOUT, SCLOUT = 10k RPU		 2.5 4.5 mA
ISD Supply current in shutdown mode through the VCC pin(1) EN = 0 V
SDAIN, SCLIN, SDAOUT, SCLOUT = 0V or VCC
READY pin = Hi-Z
EN pulled low after bus connection event (disable precharge)		 10 30 µA
UVLO Under voltage lockout (rising) EN = VCC
READY = 10 kΩ to VCC		 2.1 V
Under voltage lockout (falling) 2 V
START-UP CIRCUITRY
VPRE Pre-charge voltage SDA, SCL = Hi-Z 0.8 1 1.2 V
RISE-TIME ACCELERATORS
IPU RTA pull-up current(2) Position transition on SDA, SCL
VSDA/SCL = 0.6 V, Slew rate = 1.25 V/µs. VCC = 3.3 V		 2 5 mA
INPUT-OUTPUT CONNECTION
ILI Input pin leakage SDA/SCL pins = 90% VCC, EN = VCC, GND
SDA/SCL pins = 10% VCC, EN = GND		 -1 1 µA
VOS Input-output offset voltage (SCLIN to SCLOUT, SCLOUT to SCLIN and SDAIN to SDAOUT, SDAOUT to SDAIN RPU for SDA/SCL = 10 kΩ 60 100 mV
II_RDY Ready pin leakage EN = VCC, READY = VCC, Bus connected -1 1 µA
DIGITAL IO THRESHOLD
VIH High-level input voltage EN 0.7 × VCC VCC V
VIL Low-level input voltage EN 0 0.3 × VCC
VOL Low-level output voltage SDAIN, SCLIN, SDAOUT, SCLOUT
IOL = 4 mA
VIN = 0.1 V		 0.15 0.4
READY
IOL = 3 mA		 0 0.4
DYNAMIC CHARACTERISTICS
CIN (EN) EN input capacitance VEN = 0 V or VCC
f = 400 kHz		 1.6 4 pF
CIO (READY) READY output capacitance VREADY = 0 V or VCC
f = 400 kHz		 7 10
CIO (SDA/SCL) SDA/SCL pin capacitance VPIN = 0 V or VCC
f = 400 kHz		 5 10
STUCK BUS RECOVERY
tSTUCKBUS Stuck bus timer 25 40 65 ms
fSB_SCLOUT Stuck bus recovery clock frequency 5.5 8.5 14 kHz
VOL Low level output during stuck bus clock output IOL = 4 mA 0 0.4 V
(1) In shutdown mode there will also be current flowing from VCC through the ready pin as this pin is pulled down to indicate the bus is disconnected.
(2) Determined by design, not tested in production.