ZHCSNJ0G September   2006  – March 2021 PCA9538

PRODUCTION DATA  

  1. 特性
  2. 说明
  3. Revision History
  4. Pin Configuration and Functions
  5. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 I2C Interface Timing Requirements
    7. 5.7 RESET Timing Requirements
    8. 5.8 Switching Characteristics
    9. 5.9 Typical Characteristics
  6. Parameter Measurement Information
  7. Detailed Description
    1. 7.1 Functional Block Diagram
    2. 7.2 Device Functional Modes
      1. 7.2.1 RESET Input
        1. 7.2.1.1 RESET Errata
          1.        System Impact
          2.        System Workaround
      2. 7.2.2 Power-On Reset
      3. 7.2.3 I/O Port
      4. 7.2.4 Interrupt Output ( INT)
        1. 7.2.4.1 Interrupt Errata
          1.        System Impact
          2.        System Workaround
    3. 7.3 Programming
      1. 7.3.1 I2C Interface
    4. 7.4 Register Maps
      1. 7.4.1 Device Address
      2. 7.4.2 Control Register And Command Byte
      3. 7.4.3 Register Descriptions
      4. 7.4.4 Bus Transactions
        1. 7.4.4.1 Writes
        2. 7.4.4.2 Reads
  8. Application Information Disclaimer
    1. 8.1 Application Information Disclaimer
    2. 8.2 Typical Application
      1. 8.2.1 Detailed Design Procedure
        1. 8.2.1.1 Minimizing ICC When I/Os Control Leds
  9. Power Supply Recommendations
    1. 9.1 Power-On Reset Requirements
  10. 10Device and Documentation Support
    1. 10.1 接收文档更新通知
    2. 10.2 支持资源
    3. 10.3 Trademarks
    4. 10.4 静电放电警告
    5. 10.5 术语表
  11. 11Mechanical, Packaging, and Orderable Information

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Control Register And Command Byte

Following the successful Acknowledgment of the address byte, the bus master sends a command byte that is stored in the control register in the PCA9538 (see Figure 7-7). Two bits of this command byte state the operation (read or write) and the internal register (input, output, polarity inversion or configuration) that are affected. This register can be written or read through the I2C bus. The command byte is sent only during a write transmission.

Once a command byte has been sent, the register that was addressed continues to be accessed by reads until a new command byte has been sent.

Figure 7-7 shows the PCA9538 control register bits and Table 7-3 shows the command byte.

GUID-2537D720-B0F6-4029-B528-29F0616242BF-low.gifFigure 7-7 Control Register Bits
Table 7-3 Command Byte Table
CONTROL REGISTER BITSCOMMAND BYTE (HEX)REGISTERPROTOCOLPOWER-UP DEFAULT
B1B0
000×00Input PortRead byteXXXX XXXX
010×01Output PortRead/write byte1111 1111
100×02Polarity InversionRead/write byte0000 0000
110×03ConfigurationRead/write byte1111 1111