ZHCSNJ0G September   2006  – March 2021 PCA9538

PRODUCTION DATA  

  1. 1 特性
  2. 2 说明
  3. 3 Revision History
  4. 4 Pin Configuration and Functions
  5. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 I2C Interface Timing Requirements
    7. 5.7 RESET Timing Requirements
    8. 5.8 Switching Characteristics
    9. 5.9 Typical Characteristics
  6. 6 Parameter Measurement Information
  7. 7 Detailed Description
    1. 7.1 Functional Block Diagram
    2. 7.2 Device Functional Modes
      1. 7.2.1 RESET Input
        1. 7.2.1.1 RESET Errata
          1.        System Impact
          2.        System Workaround
      2. 7.2.2 Power-On Reset
      3. 7.2.3 I/O Port
      4. 7.2.4 Interrupt Output ( INT)
        1. 7.2.4.1 Interrupt Errata
          1.        System Impact
          2.        System Workaround
    3. 7.3 Programming
      1. 7.3.1 I2C Interface
    4. 7.4 Register Maps
      1. 7.4.1 Device Address
      2. 7.4.2 Control Register And Command Byte
      3. 7.4.3 Register Descriptions
      4. 7.4.4 Bus Transactions
        1. 7.4.4.1 Writes
        2. 7.4.4.2 Reads
  8. 8 Application Information Disclaimer
    1. 8.1 Application Information Disclaimer
    2. 8.2 Typical Application
      1. 8.2.1 Detailed Design Procedure
        1. 8.2.1.1 Minimizing ICC When I/Os Control Leds
  9. 9 Power Supply Recommendations
    1. 9.1 Power-On Reset Requirements
  10. 10Device and Documentation Support
    1. 10.1 接收文档更新通知
    2. 10.2 支持资源
    3. 10.3 Trademarks
    4. 10.4 静电放电警告
    5. 10.5 术语表
  11. 11Mechanical, Packaging, and Orderable Information

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4 Pin Configuration and Functions

Figure 4-1 DBQ, DB, PW, DGV Package, 16-Pin, Top View
Table 4-1 Pin Functions
PIN DESCRIPTION
NAME NO.
A0 1 Address input. Connect directly to VCC or ground
A1 2 Address input. Connect directly to VCC or ground.
GND 8 Ground
INT 13 Interrupt output. Connect to VCC through a pullup resistor
P0 4 P-port input-output. Push-pull design structure
P1 5 P-port input-output. Push-pull design structure
P2 6 P-port input-output. Push-pull design structure
P3 7 P-port input-output. Push-pull design structure
P4 9 P-port input-output. Push-pull design structure
P5 10 P-port input-output. Push-pull design structure
P6 11 P-port input-output. Push-pull design structure
P7 12 P-port input-output. Push-pull design structure
RESET 3 Active-low reset input. Connect to VCC through a pullup resistor if no active connection is used
SCL 14 Serial clock bus. Connect to VCC through a pullup resistor
SDA 15 Serial data bus. Connect to VCC through a pullup resistor
VCC 16 Supply voltage