ZHCSJ65A December 2018 – December 2019 OPA462
PRODUCTION DATA.
| DESCRIPTION | FIGURE |
|---|---|
| Offset Voltage Production Distribution at 25°C | Figure 1 |
| Offset Voltage Distribution at 85°C | Figure 2 |
| Offset Voltage Distribution at -40°C | Figure 3 |
| Offset Voltage Drift Distribution from -40°C to 85°C | Figure 4 |
| Offset Voltage vs Temperature | Figure 5 |
| Offset Voltage Warmup | Figure 6 |
| Offset Voltage vs Common-Mode Voltage (Low Vcm) | Figure 7 |
| Offset Voltage vs Common-Mode Voltage (High Vcm) | Figure 8 |
| Offset Voltage vs Power Supply (Low Supply) | Figure 9 |
| Offset Voltage vs Power Supply (High Supply) | Figure 10 |
| Offset Voltage vs Output Voltage (Low Output) | Figure 11 |
| Offset Voltage vs Output Voltage (High Output) | Figure 12 |
| CMRR vs Temperature | Figure 13 |
| CMRR vs Frequency | Figure 14 |
| PSRR vs Temperature | Figure 15 |
| PSRR vs Frequency | Figure 16 |
| EMIRR vs Frequency | Figure 17 |
| No Phase Reversal | Figure 18 |
| Input Bias Current Production Distribution at 25℃ | Figure 19 |
| IB vs Temperature | Figure 20 |
| IB vs Common-Mode Voltage | Figure 21 |
| Enable Response | Figure 22 |
| Current Limit Response | Figure 23 |
| Open-Loop Gain vs Temperature | Figure 24 |
| Open-Loop Gain vs Output Voltage | Figure 25 |
| Open-Loop Gain and Phase vs Frequency | Figure 26 |
| Open-Loop Output Impedance vs Frequency | Figure 27 |
| Closed-Loop Gain vs Frequency | Figure 28 |
| Maximum Output Voltage vs Frequency | Figure 29 |
| Positive Output Voltage vs Output Current | Figure 30 |
| Negative Output Voltage vs Output Current | Figure 31 |
| Short-Circuit Current vs Temperature | Figure 32 |
| Negative Overload Recovery | Figure 33 |
| Positive Overload Recovery | Figure 34 |
| Settling Time | Figure 35 |
| Phase Margin vs Capacitive Load | Figure 36 |
| Small-Signal Overshoot vs Capacitive Load (G = –1) | Figure 37 |
| Small-Signal Overshoot vs Capacitive Load (G = +1) | Figure 38 |
| Small-Signal Step Response (G = –1) | Figure 39 |
| Small-Signal Step Response (G = +1) | Figure 40 |
| Large-Signal Step Response (G = –1) | Figure 41 |
| Large-Signal Step Response (G = +1) | Figure 42 |
| Slew Rate vs Output Step Size | Figure 43 |
| Slew Rate vs Supply Voltage (Inverting) | Figure 44 |
| Slew Rate vs Supply Voltage (Noninverting) | Figure 45 |
| THD+N Ratio vs Frequency (G = 10) | Figure 46 |
| THD+N Ratio vs Frequency (G = 20) | Figure 47 |
| THD+N Ratio vs Output Amplitude (G = 10) | Figure 48 |
| THD+N Ratio vs Output Amplitude (G = 20) | Figure 49 |
| 0.1-Hz to 10-Hz Noise | Figure 50 |
| Input Voltage Noise Spectral Density | Figure 51 |
| Current Noise Density | Figure 52 |
| Quiescent Current Production Distribution at 25℃ | Figure 53 |
| Quiescent Current vs Supply Voltage | Figure 54 |
| Quiescent Current vs Temperature | Figure 55 |
| Status Flag Voltage vs Temperature | Figure 56 |
| Quiescent Current vs Enable Voltage | Figure 57 |
| Enable Current vs Enable Voltage | Figure 58 |
| Status Flag Current vs Voltage | Figure 59 |