ZHCSMO3C June   2020  – April 2021 OPA2863 , OPA863

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information: OPA863
    5. 7.5  Thermal Information: OPA2863
    6. 7.6  Electrical Characteristics: 10 V
    7. 7.7  Electrical Characteristics: 3 V
    8. 7.8  Typical Characteristics: VS = 10 V
    9. 7.9  Typical Characteristics: VS = 3 V
    10. 7.10 Typical Characteristics: VS = 3 V to 10 V
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Stage
      2. 8.3.2 Output Stage
        1. 8.3.2.1 Overload Power Limit
      3. 8.3.3 ESD Protection
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-Down Mode
      2. 8.4.2 Split-Supply Operation (±1.35 V to ±6.3 V)
      3. 8.4.3 Single-Supply Operation (2.7 V to 12.6 V)
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Amplifier Gain Configurations
    2. 9.2 Low-Side Current Sensing
      1. 9.2.1 Design Requirements
    3. 9.3 Transimpedance Amplifier
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure
      3. 9.3.3 Application Curves
    4. 9.4 Low-Power SAR ADC Driver and Reference Buffer
    5. 9.5 Front-End Gain and Filtering
    6. 9.6 Clamp-On Ultrasonic Flow Meter
    7. 9.7 Variable Reference Generator Using MDAC
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Thermal Considerations
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 接收文档更新通知
    3. 12.3 支持资源
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
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订购信息

Design Requirements

Table 9-1 Design Requirements
PARAMETERDESIGN REQUIREMENT
Shunt resistor10 mΩ
Input current15 APP
Output voltage3 VPP
Switching frequency50 kHz
Data acquisition1 MSPS with 0.1% accuracy
Input voltage due to ground bounce10 Vpk

In a difference amplifier circuit, the output voltage is given by,

GUID-DF8355E0-73C2-4BC7-B4BB-36BE711FE140-low.gif

For lowest system noise, small values of RF and RG are preferred. The smallest value of RG is limited by the input transient voltage (10 V here) seen by the circuit, and is given by,

GUID-28B5858B-D9FD-4909-94CA-A873F0C65A3D-low.gif

Where,

  • VIN(maximum) is the maximum input transient voltage seen by the circuit
  • VD is the forward voltage drop of ESD diodes at the amplifier input
  • ID(maximum) is the maximum current rating of the ESD diodes at the amplifier input

For a difference amplifier gain of 20 V/V, RF and RG of 12k Ω and 600 Ω are used, respectively. With a clock frequency of 40 MHz and ADS7056 sampling at 1 MSPS, the available acquisition time for amplifier output settling is 550 ns. Figure 9-4 shows the simulation results for the circuit in Figure 9-3. The worst-case peak-to-peak input transient condition is simulated. The OPAx863 devices output settles to within 0.1% accuracy within 543 ns. If use of a slower clock frequency with the ADC is desired, the acquisition time reduces with the same sampling rate, which degrades measurement accuracy. Alternatively, the sampling rate may be reduced to recover the required acquisition time and 0.1% accuracy.

GUID-B5B44E27-BFF1-46D4-9D16-58BCDFFE7B13-low.gifFigure 9-4 0.1% Settling Performance